参数资料
| 型号： | FS6377-01IG-XTP |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/24页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN PLL PROG 16SOIC |
| 标准包装： | 3,000 |
| 类型： | PLL 时钟发生器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | CMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:4 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 230MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
FS6377
7.0 Electrical Specifications
Table 10: Absolute Maximum Ratings
Parameter
Symbol
Min.
Max.
Units
Supply voltage, dc (VSS = ground)
VDD
VSS – 0.5
7
V
Input voltage, dc
V1
VSS – 0.5
VDD + 0.5
V
Output voltage, dc
VO
VSS – 0.5
VDD + 0.5
V
Input clamp current, dc (VI < 0 or VI > VDD)
IIK
-50
50
mA
Output clamp current, dc (VI < 0 or VI > VDD)
IOK
-50
50
mA
Storage temperature range (non-condensing)
TS
-65
150
°C
Ambient temperature range, under bias
TA
-55
125
°C
Junction temperature
TJ
150
°C
Re-flow solder profile
Per IPC/JEDEC J-STD-020B
Input static discharge voltage protection (MIL-STD 883E, Method 3015.7)
2
kV
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional
operation of the device of these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for
extended conditions may affect device performance, functionality and reliability.
CAUTION: ELETROSTATIC SENSITIVE DEVICE
Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic
discharge.
Table 11: Operating Conditions
Parameter
Symbol
Conditions/Descriptions
Min.
Typ.
Max.
Units
Supply voltage
VDD
5V ± 10%
3.3V ± 10%
4.5
3
5
3.3
5.5
3.6
V
Ambient operating temperature range
TA
Commercial
Industrial
0
-40
70
85
°C
Crystal resonator frequency
fXIN
5
27
MHz
Crystal resonator load capacitance
CXL
Parallel resonant, AT cut
18
pF
Serial data transfer rate
Standard mode
10
100
kb/s
Output driver load capacitance
CL
15
pF
Table 12: DC Electrical Specifications
Parameter
Symbol
Conditions/Descriptions
Min.
Typ.
Max.
Units
Overall
Supply current, dynamic, with load outputs
IDD
VDD = 5.5V, fCLK = 50MHz, CL = 15pF
See Figure 10 for more information
43
mA
Supply current, static
IDDL
VDD = 5.5V, device powered down
0.3
mA
Power-Down, Output Enable Pins (PD, OE)
High-level input voltage
VIH
VDD = 5.5V
VDD = 3.6V
3.85
2.52
VDD +0.3
V
Low-level input voltage
VIL
VDD = 5.5V
VDD = 3.6V
VSS - 0.3
1.65
1.08
V
Hysteresis voltage
Vhys
VDD = 5.5V
VDD = 3.6V
2.20
1.44
V
High-level input current
IIH
-1
1
A
Low-level input current (pull-up)
IIL
VIL = 0V
-20
-36
-80
A
Serial Interface I/O (SCL, SDA)
High-level input voltage
VIH
VDD = 5.5V
VDD = 3.6V
3.85
2.52
VDD +0.3
V
Low-level input voltage
VIL
VDD = 5.5V
VDD = 3.6V
VSS - 0.3
1.65
1.08
V
Hysteresis voltage
Vhys
VDD = 5.5V
VDD = 3.6V
2.20
1.44
V
High-level input current
IIH
-1
1
A
Low-level input current (pull-up)
IIL
VIL = 0V
-20
-36
-80
A
Low-level output sink current (SDA)
IOL
VOL = 0.4V, VDD = 5.5V
26
mA
Rev. 4 | Page 15 of 24 | www.onsemi.com
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