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参数资料
| 型号： | GMZAN3T |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | XGA ALALOG INTERFACE LCD MONITOR CONTROLLER |
| 中文描述： | ALALOG的XGA液晶显示器接口控制器 |
| 文件页数： | 35/53页 |
| 文件大小： | 556K |
| 代理商： | GMZAN3T |
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gmZAN3 Preliminary Data Sheet
C0523-DAT-01G
40
July 2003
Ge nes i s Microc hip Confid e n tia l
http:// w ww . g enesis-mic r ochip.com
OSD Position – The OSD menu can be positioned anywhere on the display region. The reference point is
Horizontal and Vertical Display Background Start (DH_BKGND_START and DV_BKGND_START in
OSD Stretch – The OSD image can be stretched horizontally and/or vertically by a factor of two. Pixel
and line replication is used to stretch the image.
4.12.1 On-Chip OSD SRAM
The on-chip static RAM (10K bytes) stores the cell map and the cell definitions.
In memory, the cell map is organized as an array of words, each defining the attributes of one visible
character on the screen starting from upper left of the visible character array. These attributes specify
which character to display, whether it is stored as 1 or 2-bits per pixel, the foreground and background
colors, blinking, etc.
Registers CELLMAP_XSZ and CELLMAP_YSZ are used to define the visible area of the OSD image.
For example, Figure 25 shows a cell map for which CELLMAP_XSZ =25 and CELLMAP_YSZ =10.
CELLMAP_YSZ
CELLMAP_XSZ
Address 1:
Cell Attributes for
upper-left hand cell
Address 25:
Attributes for
upper-right hand cell
Address26:
Cell attributes for
1
st cell, 2nd row
Brightness
Contrast
Figure 25.
OSD Cell Map
Cell font definitions are stored as bit map data. On-chip registers point to the start of 1-bit per pixel
definitions and 2-bit per pixel definitions respectively. 1 and 2-bit per pixel cell definitions require 1 or 2
words of the OSD RAM per character height line.
Note that the cell map and the cell font definitions share the same on-chip RAM. Thus, the size of the cell
map can be traded off against the number of different cell definitions. In particular, the size of the OSD
image and the number of cell definitions must fit in OSD SRAM. That is, the following inequality must
be satisfied.
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