
2
GP2000 – GPS CHIPSET DESIGNER’S GUIDE
The choice of microprocessor may influence memory selec-
tion if it has desirable features such as an on-chip cache RAM.
Reference Oscillator
The reference oscillator can be a significant cost component
in a GPS receiver.
The short-term stability tends to impact on the receiver
tracking performance since it is equivalent to the receiver
undergoing a change in dynamics.
The long-term stability tends to impact signal acquisition times
and receiver TTFF since it can widen the acquisition search
window and increase the window overlap.
The main trade-offs for reference oscillator selection are
between cost, stability and temperature range.
Careful consideration should be given to the operating tempera-
ture range due to its relationship to oscillator cost (a wider tempera-
ture range for a given stability means a higher cost) and stability (a
narrower temperature range for a given stability at lower cost) .
Temperature compensated crystal oscillators (TCXOs) of
stabilities in the region 63ppm over a temperature range of
approximately 230
°C to 170°C provide a good general purpose
oscillator. They can give acceptable performance even without
software characterisation of the oscillator (prediction of the
oscillator’s offset from its nominal value).
Cheaper, less stable (610ppm or so) uncompensated crystal
oscillators can be used in conjunction with software
characterisation and compensation and still give the required
performance over a wide operating temperature range.
The designer should be aware if the type of oscillator used is
prone to any sudden step changes in stability over the operating
range since such characteristics are likely to cause loss of signal
tracking.
GP2021
12-CHANNEL
CORRELATOR
+ SUPPORT
FUNCTIONS
PROCESSOR CONTROL
INTERRUPTS
ARM60
32-BIT RISC
ROM
RAM
E2PROM
ADDRESS BUS
DATA
BUS
CLOCK
CRYSTAL
40MHz CLK
SAMP CLK
SIGN
MAG
PRESET
PLL_LOCK
GP2015
RF
FRONT END
DW9255
35MHz
SAWF
MEMORY CONTROL
175MHz
LC
FILTER
DUAL SERIAL
COMMUNICATIONS
PORTS
10MHz
TCXO
LNA
Fig. 2 GP2015/GP2021/ARM60 GPS receiver
Other Blocks
Real-Time Clock
The use of a real-time clock, if kept active during power-
downs, can shorten acquistion times by enabling prediction of
satellite visibilities and Doppler shifts. This reduces the TTFF by
enabling a ‘warm’ start.
Serial Communications
Most GPS engines will have at least two serial I/O ports. One is
usually dedicated to the reception of RTCM SC-104 DGPS correc-
tion data and the other for receiver control and status monitoring.
Control Logic
Dependent upon the exact nature of the receiver compo-
nents, a certain amount of control or glue logic may be neces-
sary to interface the components together.
GP2015/GP2021/ARM60 GPS RECEIVER
Fig. 2 shows how the GP2015, GP2021 and ARM60 can be
used to create a low cost GPS receiver solution with 12 chan-
nels and a minimum of external supporting components.
The internal memory management control logic of the
GP2021 means that when used with the ARM60 no additional
control or glue logic is required.
The GP2021 supports RAM, E2PROM and ROM/EPROM/
FLASH with a configurable number of wait states for the E2PROM
and ROM. The GP2021 can only support zero wait state RAM.
The on-chip real-time clock (RTC) and dual UART functions
reduce the need for external components still further.
The GP2015 and GP2021 integrated circuits are described
in the following two sections