
16
GP2000 – GPS CHIPSET DESIGNER’S GUIDE
Data Demodulation
For coherent data demodulation the carrier samples are ro-
tated through the average carrier phase,
fK, as follows:
Inew = Ikcosfk1Qksinfk
Qnew = Qkcosfk1Iksinfk
Inew can be integrated over the bit period (20ms) to give a
representation of the current data bit. To minimise computational
loading the functions sin() and cos() are determined through look-
up tables. Successful (no parity errors) data demodulation oc-
curs for post-correlation SNRs down to approximately 5-6dB.
Fig. 16 Data demodulation with SNR = 5dB
Fig. 17 Data demodulation with SNR = 15dB
The 1ms Epoch Counter is slewed so that its value is zero at
the data bit transition, if this is not already the case. The data bit
transition position is continually monitored.
Data Frame Synchronisation
Frame sync is achieved by searching for the following
parameters contained in the TLM and HOW words across 60
successive data bits (2 words):
(i) TLM preamble (10001011 )
(ii) HOW subframe ID (1 to 5)
(iii) HOW zero bits (bits 29 and 30)
If all the above data is found, and the 2 words pass the parity
check, then the value of the 20ms Epoch counter is checked.
The 20ms Epoch Counter should have a value of zero at the
start of each subframe and so a value of 10 at the end of the
second word (HOW word). If its value is 10, then frame sync is
declared. If it is not 10, then the 20ms Epoch Counter is slewed
to its correct value.
Frame sync will then be declared 1 subframe later.
Observation Measurement Block
Measurement Blocks
At each TIC the following data is stored, for each active chan-
nel, to be used in the navigator function:
(i)
If the channel has valid data
(ii) The satellite PRN assigned to the channel
(iii) The epoch count register (1ms & 20ms epoch counts)
(iv) The code phase register (number of 1/2 chips of code)
(v) The code DCO phase register (the fractional code phase)
(vi) The carrier DCO phase register (the fractional carrier phase)
(vii) The carrier DCO phase register at the last TIC
(viii) The carrier cycle count (whole cycles between TlCs)
(ix) The lost lock indicator
Formulation of The Pseudo-Range, Pseudo-
Range Rate and Integrated Carrier Phase
Formulation of The Pseudo-Range
Data Bit And Data Frame Synchronisation
Data Bit Synchronisation
The data bit transition is determined by performing a run-
ning sum of the in-phase correlations over a bit period at each
of the possible twenty 1-millisecond epoch settings. The epoch
with the largest integration is declared as the provisional data
bit transition. If the best epoch does not change over a
2-second period then bit sync is declared at this position.
At each TIC the pseudo-range is given by the time of recep-
tion of the signal minus the time of transmission. This measure-
ment will include the receiver clock bias. Other corrections fo
the satellite clock error, Earth rotation plus atmospheric and rela-
tivistic effects are applied later.
The time of transmission (modulo 1 second) is determined
from the epoch counters and code DCO setting:
Transmit Time = 20320ms_EPOCH_ COUNT
1
1_ms_EPOCH_COUNT
1
CODE_DCO_PHASE
2
1/4 chip
The code DCO phase includes the number of 1/2 chips plus
the fractional phase.
The 1/4 chip term is included because the measurement block
data is referenced to the Prompt arm which is set 1/4 chip late in
the EML Tracker.
The Reception Time is the receiver clock estimate of GPS
System Time at the measurement block TlC. The receiver clock
is assumed to be accurate to 61/2 second to avoid any ambi-
guity in the pseudo-range. For all practical systems this will be
the case.
Hence, Pseudo-range = Reception Time2Transmission Time
(modulo 05 seconds).
The pseudo-range is transformed into units of metres.
The pseudo-range rate (including satellite and receiver clock
drifts) can be determined from the offset of the carrier DCO from
its nominal value:
Pseudo-range rate = 2
DD3c/L1
where
DD is the carrier DCO offset from its nominal value, c is
the speed of light and
L1 is 157542MHz.
–2000
–2500
–1500
1000 1500 2000 2500
2500
2000
1500
1000
–1500
–1000
–2000
–2500
QNEW
INEW
IQ DIAGRAM FOR SNR 5dB
1488 POINTS
1ms INTEGRATION PERIOD
MEAN SQUARE = 297, 458
–2500
–1500
1000 1500
2500
2000
1500
1000
–1500
–1000
–2000
–2500
QNEW
INEW
500
–500
0
IQ DIAGRAM FOR SNR 15dB
1488 POINTS
1ms INTEGRATION PERIOD
MEAN SQUARE = 3, 048, 219