参数资料
| 型号： | HIP6503CBZ |
| 厂商： | Intersil |
| 文件页数： | 11/14页 |
| 文件大小： | 0K |
| 描述： | IC ACPI MULTI POWER CTRLR 20SOIC |
| 标准包装： | 380 |
| 应用： | 处理器 |
| 电流 - 电源： | 30mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 包装： | 管件 |
HIP6503
high-frequency decoupling capacitors should be placed as
close as possible to the load they are decoupling; the ones
decoupling the controller close to the controller pins, the
ones decoupling the load close to the load connector or the
load itself (if embedded). Even though bulk capacitance
(aluminum electrolytics or tantalum capacitors) placement is
not as critical as the high-frequency capacitor placement,
having these capacitors close to the load they serve is
preferable.
The critical small signal components include the soft-start
capacitor, C SS , as well as the memory selection resistor,
R SEL . Locate these components close to the respective pins
of the control IC, and connect them to ground through a via
placed close to the ground pad. Minimize any leakage
current paths from these nodes, since the internal current
sources are only 10s of microamperes (10 μ A to 40 μ A).
+12V IN
+5V SB
plane should support both the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers to create power islands connecting the filtering
components (output capacitors) and the loads. Use the
remaining printed circuit layers for small signal wiring.
Component Selection Guidelines
Output Capacitors Selection
The output capacitors for all outputs should be selected to
allow the output voltage to meet the dynamic regulation
requirements of active state operation (S0, S1). The load
transient for the various microprocessor system’s
components may require high quality capacitors to supply
the high slew rate (di/dt) current demands. Thus, it is
recommended that the output capacitors be selected for
transient load regulation, paying attention to their parasitic
components (ESR, ESL).
Also, during the transition between active and sleep states,
C 12V
12V
C 5VSB
5VSB
C IN
there is a short interval of time during which none of the
power pass elements are conducting - during this time the
output capacitors have to supply all the output current. The
? V OUT = I OUT × ? ESR OUT + ---------------- ? , where
C HF1
V OUT1
C SS
C BULK1
SS
1V8SB
5VDLSB
5VDL
C BULK5
V OUT5
C HF5
Q4
output voltage drop during this brief period of time can be
easily approximated with the following formula:
? t t ?
? C OUT ?
Q2
3V3DLSB
? V OUT - output voltage drop
DLA
C HF3
V OUT3
C BULK3
HIP6503
1V8IN
3V3DL
5V
Q5
+5V IN
V OUT2 C HF2
ESR OUT - output capacitor bank ESR
I OUT - output current during transition
C OUT - output capacitor bank capacitance
t t - active-to-sleep or sleep-to-active transition time (10 μ s typ.)
Q3
C BULK4
VCLK
3V3
VSEN2
GND DRV2
Q1
C BULK2
The output voltage drop is heavily dependent on the ESR
(equivalent series resistance) of the output capacitor bank,
the choice of capacitors should be such as to maintain the
output voltage above the lowest allowable regulation level.
C HF4
KEY
+3.3V IN
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT/POWER PLANE LAYER
VIA CONNECTION TO GROUND PLANE
V CLK (V OUT4 ) Output Capacitors Selection
The output capacitor for the V CLK linear regulator provides
loop stability. Figure 11 outlines a capacitance vs. equivalent
series resistance envelope. For stable operation and
optimized performance, select a C OUT4 capacitor or
combination of capacitors with characteristics within the
FIGURE 10. PRINTED CIRCUIT BOARD ISLANDS
A multi-layer printed circuit board is recommended. Figure
10 shows the connections of most of the components in the
converter. Note that the individual capacitors shown each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections through vias placed as close
to the component terminal as possible. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. Ideally, the power
11
shown envelope.
FN4882.5
July 21, 2005
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| HIP6503CBZ-T | 功能描述:PMIC 解决方案 W/ANNEAL ACPI PWR MG T CIRCUIT 20LD RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
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