参数资料
| 型号： | HIP6503CBZ |
| 厂商： | Intersil |
| 文件页数： | 12/14页 |
| 文件大小： | 0K |
| 描述： | IC ACPI MULTI POWER CTRLR 20SOIC |
| 标准包装： | 380 |
| 应用： | 处理器 |
| 电流 - 电源： | 30mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 包装： | 管件 |
HIP6503
Q2
10
1
0.1
The NPN transistor used as sleep state pass element (Q2)
on the 3.3V DUAL output has to have a minimum current gain
of 100 at 1.5V V CE and 500mA I CE throughout the in-circuit
operating temperature range.
Q3, 4, Q2 in 3.3V MEM configuration
These N-Channel MOSFETs are used to switch the 3.3V
and 5V inputs provided by the ATX supply into the 3.3V MEM ,
3.3V DUAL /3.3V SB , and 5V DUAL outputs, while in active (S0,
S1) state. The main criteria for the selection of these
transistors is output voltage budgeting. The maximum
r DS(ON) allowed at highest junction temperature can be
expressed with the following equation:
r DS ( ON ) max = --------------------------------------------------- , where
0.01
10
100
CAPACITANCE ( μ F)
1000
V INmin – V OUTmin
I OUTmax
FIGURE 11. C OUT4 OUTPUT CAPACITOR
Input Capacitors Selection
The input capacitors for an HIP6503 application have to
have a sufficiently low ESR as to not allow the input voltage
to dip excessively when energy is transferred to the output
capacitors. If the ATX supply does not meet the
specifications, certain imbalances between the ATX’s
outputs and the HIP6503’s regulation levels could have as a
result a brisk transfer of energy from the input capacitors to
the supplied outputs. At the transition between active and
sleep states, this phenomena could result in the 5VSB
voltage drooping excessively and affecting the output
regulation. The solution to a potential problem such as this is
using larger input capacitors with a lower total combined
ESR.
Transistor Selection/Considerations
The HIP6503 usually requires one P-Channel (or bipolar
PNP), two N-Channel MOSFETs and two bipolar NPN
transistors.
One important criteria for selection of transistors for all the
linear regulators/switching elements is package selection for
efficient removal of heat. The power dissipated in a linear
regulator/switching element is
P LINEAR = I O × ( V IN – V OUT )
Select a package and heatsink that maintains the junction
temperature below the rating with the maximum expected
ambient temperature.
Q1
The active element on the 2.5V MEM output has to be a
bipolar NPN capable of conducting the maximum active
memory current and exhibit a current gain (h fe ) of minimum
40 at this current and 0.7V V CE .
12
V INmin - minimum input voltage
V OUTmin - minimum output voltage allowed
I OUTmax - maximum output current
The gate bias available for these MOSFETs is of the order of
8V.
Q5
If a P-Channel MOSFET is used to switch the 5VSB output
of the ATX supply into the 5V DUAL output during S3 and S5
states (as dictated by EN5VDL status), then the selection
criteria of this device is proper voltage budgeting. The
maximum r DS(ON) , however, has to be achieved with only
4.5V of V GS , so a logic level MOSFET needs to be selected.
If a PNP device is chosen to perform this function, it has to
have a low saturation voltage while providing the maximum
sleep current and have a current gain sufficiently high to be
saturated using the minimum drive current (typically 20mA).
FN4882.5
July 21, 2005
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HIP6503CBZ-T | 功能描述:PMIC 解决方案 W/ANNEAL ACPI PWR MG T CIRCUIT 20LD RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| HIP6503CR | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| HIP6503EVAL1 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiple Linear Power Controller with ACPI Control Interface |
| HIP6521 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:PWM and Triple Linear Power Controller |
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