参数资料
型号: HIP6503CBZ
厂商: Intersil
文件页数: 5/14页
文件大小: 0K
描述: IC ACPI MULTI POWER CTRLR 20SOIC
标准包装: 380
应用: 处理器
电流 - 电源: 30mA
电源电压: 4.75 V ~ 5.25 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
供应商设备封装: 20-SOIC W
包装: 管件
HIP6503
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted Refer to Figures 1, 2 and 3 (Continued)
PARAMETER
DRV2 Output Drive Current
DRV2 Output Impedance
SYMBOL
I DRV2
TEST CONDITIONS
5VSB = 5V, R SEL = 1k ?
R SEL = 10k ?
MIN
220
-
TYP
-
200
MAX
-
-
UNITS
mA
?
3.3V DUAL /3.3V SB LINEAR REGULATOR (V OUT3 )
Sleep State Regulation
-
-
2.0
%
3V3DL Nominal Voltage Level
3V3DL Undervoltage Rising Threshold
3V3DL Undervoltage Hysteresis
V 3V3DL
-
-
-
3.3
2.739
99
-
-
-
V
V
mV
3V3DLSB Output Drive Current
DLA Output Impedance
I 3V3DLSB
5VSB = 5V
5
-
10
90
-
-
mA
?
2.5V CLK LINEAR REGULATOR (V OUT4 )
Regulation
-
-
2.0
%
VCLK Nominal Voltage Level
VCLK Undervoltage Rising Threshold
VCLK Undervoltage Hysteresis
V VCLK
-
-
-
2.5
2.075
75
-
-
-
V
V
mV
VCLK Output Current (Note 4)
I VCLK
V 3V3 = 3.3V
500
800
-
mA
5V DUAL SWITCH CONTROLLER (V OUT5 )
5VDL Undervoltage Rising Threshold
5VDL Undervoltage Hysteresis
-
-
4.150
150
-
-
V
mV
5VDLSB Output Drive Current
5VDLSB Pull-Up Impedance to 5VSB
I 5VDLSB
5VDLSB = 4V, 5VSB = 5V
-20
-
-
350
-40
-
mA
?
TIMING INTERVALS
Active State Assessment Past Input UV
20
25
30
ms
Thresholds (Note 5)
Active-to-Sleep Control Input Delay
-
200
-
μ s
CONTROL I/O (S3, S5, EN5VDL, FAULT/MSEL)
High Level Input Threshold
Low Level Input Threshold
S3, S5 Internal Pull-up Impedance to 5VSB
-
0.8
-
-
-
50
2.2
-
-
V
V
k ?
FAULT Output Impedance
FAULT = high
-
100
-
?
TEMPERATURE MONITOR
Fault-Level Threshold (Note 6)
Shutdown-Level Threshold (Note 6)
125
-
-
155
-
-
°C
°C
NOTES:
2. Sleep-State Only for 3.3V Setting
3. Parameters not guaranteed for 5VSB < 4.0V.
4. At Ambient Temperatures Less Than 50°C.
5. Guaranteed by Correlation.
6. Guaranteed by Design.
5
FN4882.5
July 21, 2005
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