参数资料
型号: HW-SPAR3-SK-UNI-G
厂商: Xilinx Inc
文件页数: 30/64页
文件大小: 0K
描述: KIT STARTER SPARTAN-3
产品变化通告: Adapter Replacement 23/May/2008
Development Systems Discontinuation 22/Jun/2009
标准包装: 1
系列: Spartan-3
类型: FPGA 配置
适用于相关产品: Spartan-3
所含物品: 面板、缆线、软件、数据表和用户手册
其它名称: 122-1521
R
Chapter 6: PS/2 Mouse/Keyboard Port
The following site contains more information on PS/2 keyboard interfaces:
?
The PS/2 Keyboard Interface
Mouse
A mouse generates a clock and data signal when moved; otherwise, these signals remain
High indicating the Idle state. Each time the mouse is moved, the mouse sends three 11-bit
words to the host. Each of the 11-bit words contains a ‘0’ start bit, followed by 8 data bits
(LSB first), followed by an odd parity bit, and terminated with a ‘1’ stop bit. Each data
transmission contains 33 total bits, where bits 0, 11, and 22 are ‘0’ start bits, and bits 10, 21,
and 32 are ‘1’ stop bits. The three 8-bit data fields contain movement data as shown in
Figure 6-4 . Data is valid at the falling edge of the clock, and the clock period is 20 to 30 kHz.
Mouse status byte
X direction byte
Y direction byte
1
0
L
R
0
1 XS YS XV YV P
1
0 X0 X1 X2 X3 X4 X5 X6 X7 P
1
0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 P
1
Idle state
Start bit
Stop bit
Start bit
Stop bit
Start bit
Stop bit
Idle state
UG130_c6_04_042404
Figure 6-4: PS/2 Mouse Transaction
As shown in Figure 6-5 , a PS/2 mouse employs a relative coordinate system wherein
moving the mouse to the right generates a positive value in the X field, and moving to the
left generates a negative value. Likewise, moving the mouse up generates a positive value
in the Y field, and moving down represents a negative value. The XS and YS bits in the
status byte define the sign of each value, where a ‘1’ indicates a negative value.
+Y values (YS=0)
-X values
(XS=1)
-Y values (YS=1)
+X values
(XS=0)
UG130_c6_05_042404
Figure 6-5:
The Mouse Uses a Relative Coordinate System to Track Movement
The magnitude of the X and Y values represent the rate of mouse movement. The larger the
value, the faster the mouse is moving. The XV and YV bits in the status byte indicate when
the X or Y values exceed their maximum value, an overflow condition. A ‘1’ indicates when
30
Spartan-3 FPGA Starter Kit Board User Guide
UG130 (v1.2) June 20, 2008
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