参数资料
型号: HW-SPAR3-SK-UNI-G
厂商: Xilinx Inc
文件页数: 36/64页
文件大小: 0K
描述: KIT STARTER SPARTAN-3
产品变化通告: Adapter Replacement 23/May/2008
Development Systems Discontinuation 22/Jun/2009
标准包装: 1
系列: Spartan-3
类型: FPGA 配置
适用于相关产品: Spartan-3
所含物品: 面板、缆线、软件、数据表和用户手册
其它名称: 122-1521
R
Chapter 9
FPGA Configuration Modes and
Functions
FPGA Configuration Mode Settings
In most applications for the Spartan ? -3 FPGA Starter Kit Board, the FPGA automatically
boots from the on-board Platform Flash memory whenever power is applied or the PROG
push button is pressed. However, the board supports all the available configuration modes
via the J8 header, indicated as 16 in Figure 1-2 . Table 9-1 provides the available option
settings for the J8 header. Additionally, the JP1 jumper setting is required when using
Master Serial configuration mode, as further described in “Platform Flash Jumper Options
The default jumper settings for the board are:
?
?
All jumpers in the J8 header are installed
The JP1 jumper is in the “Default” position
Table 9-1:
Header J8 Controls the FPGA Configuration Mode
Configuration
Mode
<M0:M1:M2>
Header J8
Settings
Jumper JP1
Setting
Description
Master Serial
<0:0:0>
GND J8
or
JP1
DEFAULT . The FPGA automatically boots from the Platform
Flash.
M0 M1 M2
JP1
JP1
The FPGA attempts to boot from a serial configuration source
attached to either expansion connector A2 or B1.
Slave Serial
<1:1:1>
GND J8
JP1
Another device connected to either the A2 or B1 expansion
connector provides serial data and clock to load the FPGA.
M0 M1 M2
Master Parallel
<1:1:0>
GND J8
JP1
The FPGA attempts to boot from a parallel configuration source
attached to the B1 expansion connector.
M0 M1 M2
Spartan-3 FPGA Starter Kit Board User Guide
UG130 (v1.2) June 20, 2008
36
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