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参数资料
| 型号： | HY27UG084GDM-TPIS |
| 厂商： | HYNIX SEMICONDUCTOR INC |
| 元件分类： | PROM |
| 英文描述： | 512M X 8 FLASH 3.3V PROM, 30 ns, PDSO48 |
| 封装： | 12 X 20 MM, 1.20 MM HEIGHT, LEAD FREE, TSOP1-48 |
| 文件页数： | 7/53页 |
| 文件大小： | 438K |
| 代理商： | HY27UG084GDM-TPIS |
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Rev 0.5 / Oct. 2005
15
Preliminary
HY27UG(08/16)4G(2/D)M Series
4Gbit (512Mx8bit / 256Mx16bit) NAND Flash
3.9 Cache Read
Cache read operation allows automatic download of consecutive pages, up to the whole device. Immediately after 1st
latency end, while user can start reading out data, device internally starts reading following page.
Start address of 1st page is at page start (A<10:0>=00h), after 1st latency time (tr) , automatic data download will
be uninterrupted. In fact latency time is 30us, while download of a page require at least 120us for x8 device (60us for
X16 device).
Cache read operation command is like standard read, except for confirm code (30h for standard read, 31h for cache
read) user can check operation status using :
- RB# ( ‘0’ means latency ongoing, download not possible, ‘1’ means download of n page possible, even if device
internally is active on n+1 page
- Status register (SR<6> behave like RB#, SR<5> is ‘0’ when device is internally reading and ‘1’ when device is idle)
To exit cache read operation a cache read exit command (34h) must be issued. this command can be given any time
(both device idle and reading).
If device is active (SR<5>=0) it will go idle within 5us, while if it is not active, device itself will go busy for a time
shorter then tRBSY before becoming again idle and ready to accept any further commands.
If user arrives reading last byte/word of the memory array, then has to stop by giving a cache read exit command.
Random data output is not available in cache read.
Cache read operation must be done only block by block if system needs to avoid reading also from invalid blocks.
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PDF描述 |
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| HY29F040AC-55E | 512K X 8 FLASH 5V PROM, 55 ns, PQCC32 |
| HY5116160CTC-70 | 1M X 16 FAST PAGE DRAM, 70 ns, PDSO44 |
| HY5116404BSLR-60 | 4M X 4 EDO DRAM, 60 ns, PDSO24 |
| HY5117400BLJ-70 | 4M X 4 FAST PAGE DRAM, 70 ns, PDSO |
| HY51V16160BRC-70 | 1M X 16 FAST PAGE DRAM, 70 ns, PDSO44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HY27UG088G5B | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:8Gb NAND FLASH |
| HY27UG088G5M | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:8Gbit (1Gx8bit) NAND Flash |
| HY27UG088G5M-T(P) | 制造商:SK Hynix Inc 功能描述: |
| HY27UG088GDB | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:8Gb NAND FLASH |
| HY27UG088GDM | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:8Gbit (1Gx8bit) NAND Flash |
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