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| 型号： | HY5R288HC |
| 英文描述： | -|2.5V|8K|40|Direct RDRAM - 288M |
| 中文描述： | - |为2.5V | 8K的| 40 |直接RDRAM的- 288M |
| 文件页数： | 9/64页 |
| 文件大小： | 4542K |
| 代理商： | HY5R288HC |
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Rev.0.9 / Dec.2000
9
Direct RDRAM
256/288-Mbit (512Kx16/18x32s) Preliminary
Table 7 shows the COP field encoding. The device must be
in the ATTN power state in order to receive COLC packets.
The COLC packet is used primarily to specify RD (read) and
WR (write) commands. Retire operations (moving data from
the write buffer to a sense amp) happen automatically. See
Figure 17: for a more detailed description.
The COLC packet can also specify a PREC command,
which precharges a bank and its associated sense amps. The
RDA/WRA commands are equivalent to combining RD/WR
with a PREC. RLXC (relax) performs a power mode transi-
tion. See “Power State Management” on page 38.
Table 8 shows the COLM and COLX field encodings. The
M bit is asserted to specify a COLM packet with two 8 bit
bytemask fields MA and MB. If the M bit is not asserted, an
COLX is specified. It has device and bank address fields,
and an opcode field. The primary use of the COLX packet is
to permit an independent PREX (precharge) command to be
specified without consuming control bandwidth on the ROW
pins. It is also used for the CAL(calibrate) and SAM
(sample) current control commands (see “Current and
Temperature Control” on page 44), and for the RLXX power
mode command (see “Power State Management” on
page 38).
Table 7: COLC Packet Field Encodings
S
DC4.. DC0
(select device)
a
COP3..0 Name
Command Description
0
----
-----
-
No operation.
1
/= (DEVID4 ..0)
-----
-
Retire write buffer of this device.
1
== (DEVID4 ..0)
x000
b
NOCOP
Retire write buffer of this device.
1
== (DEVID4 ..0)
x001
WR
Retire write buffer of this device, then write column C6..C0 of bank BC4..BC0 to write buffer.
1
== (DEVID4 ..0)
x010
RSRV
Reserved, no operation.
1
== (DEVID4 ..0)
x011
RD
Read column C6..C0 of bank BC4..BC0 of this device.
1
== (DEVID4 ..0)
x100
PREC
Retire write buffer of this device, then precharge bank BC4..BC0 (see Figure 14:).
1
== (DEVID4 ..0)
x101
WRA
Same as WR, but precharge bank BC4..BC0 after write buffer (with new data) is retired.
1
== (DEVID4 ..0)
x110
RSRV
Reserved, no operation.
1
== (DEVID4 ..0)
x111
RDA
Same as RD, but precharge bank BC4..BC0 afterward.
1
== (DEVID4 ..0)
1xxx
RLXC
Move this device into the standby (STBY) power state (see Figure 46:).
a. “/=” means not equal, “==” means equal.
b. An “x” entry indicates which commands may be combined. For instance, the two commands WR/RLXC may be specified in one COP value (1001).
Table 8: COLM Packet and COLX Packet Field Encodings
M
DX4 .. DX0
(selects device)
XOP4..0
Name
Command Description
1
----
-
MSK
MB/MA bytemasks used by WR/WRA.
0
/= (DEVID4 ..0)
-
-
No operation.
0
== (DEVID4 ..0)
00000
NOXOP
No operation.
0
== (DEVID4 ..0)
1xxx0
a
PREX
Precharge bank BX4..BX0 of this device (see Figure 14:).
0
== (DEVID4 ..0)
x10x0
CAL
Calibrate (drive) I
OL
current for this device (see Figure 52:).
0
== (DEVID4 ..0)
x11x0
CAL/SAM
Sample ( update) I
OL
current for this device (see Figure 52:).
0
== (DEVID4 ..0)
xxx10
RLXX
Move this device into the standby (STBY) power state (see Figure 46:).
0
== (DEVID4 ..0)
xxxx1
RSRV
Reserved, no operation.
a. An “x” entry indicates which commands may be combined. For instance, the two commands PREX/RLXX may be specified in one XOP value (10010).
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