- 您现在的位置：买卖IC网 > PDF目录224000 > HYS72T64000EP-3.7-B2 (QIMONDA AG) 64M X 72 DDR DRAM MODULE, DMA240 PDF资料下载
参数资料
| 型号： | HYS72T64000EP-3.7-B2 |
| 厂商： | QIMONDA AG |
| 元件分类： | DRAM |
| 英文描述： | 64M X 72 DDR DRAM MODULE, DMA240 |
| 封装： | GREEN, RDIMM-240 |
| 文件页数： | 19/64页 |
| 文件大小： | 3411K |
| 代理商： | HYS72T64000EP-3.7-B2 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页当前第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页
HYS72T[64/128/256]xx0EP–[2.5/25F/3/3S/3.7]–B2
Registered DDR2 SDRAM Modules
Internet Data Sheet
Rev. 1.02, 2008-06
26
07312007-HYD2-P177
3.5
ODT AC Electrical Characteristics
This chapter describes the ODT AC electrical characteristics.
TABLE 16
ODT AC Characteristics and Operating Conditions for DDR2-667 , DDR2-800
TABLE 17
ODT AC Characteristics and Operating Conditions for DDR2-533
Symbol
Parameter / Condition
Values
Unit
Note
Min.
Max.
t
AOND
ODT turn-on delay
2
n
CK
1)
1) New units, “
t
CK.AVG” and “nCK”, are introduced in DDR2-667 and DDR2-800 Unit “tCK.AVG” represents the actual tCK.AVG of the input clock
under operation. Unit “
n
CK” represents one clock cycle of the input clock, counting the actual clock edges. Note that in DDR2-400 and
DDR2-533, “
t
CK” is used for both concepts. Example: tXP = 2 [nCK] means; if Power Down exit is registered at Tm, an Active command may
be registered at
T
m + 2, even if (Tm + 2 - Tm) is 2 x tCK.AVG + tERR.2PER(Min).
t
AON
ODT turn-on
t
AC.MIN
t
AC.MAX +0.7 ns
ns
2) ODT turn on time min is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when
the ODT resistance is fully on. Both are measured from
t
AOND, which is interpreted differently per speed bin. For DDR2-667/800 tAOND is
2 clock cycles after the clock edge that registered a first ODT HIGH counting the actual input clock edges.
t
AONPD
ODT turn-on (Power-Down Modes)
t
AC.MIN + 2 ns
2
t
CK + tAC.MAX + 1 ns
ns
t
AOFD
ODT turn-off delay
2.5
n
CK
t
AOF
ODT turn-off
t
AC.MIN
t
AC.MAX +0.6 ns
ns
3) ODT turn off time min is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Both are measured from
t
AOFD, which is interpreted differently per speed bin. For DDR2-667/800, if tCK(avg) = 3 ns is assumed,
t
AOFD is 1.5 ns (= 0.5 x 3 ns) after the second trailing clock edge counting from the clock edge that registered a first ODT LOW and by
counting the actual input clock edges.
t
AOFPD
ODT turn-off (Power-Down Modes)
t
AC.MIN + 2 ns
2.5
t
CK + tAC.MAX +1ns
ns
t
ANPD
ODT to Power Down Mode Entry Latency
3
—
n
CK
t
AXPD
ODT Power Down Exit Latency
8
—
n
CK
Symbol
Parameter / Condition
Values
Unit
Note
Min.
Max.
t
AOND
ODT turn-on delay
2
t
CK
t
AON
ODT turn-on
t
AC.MIN
t
AC.MAX + 1 ns
ns
1)
1) ODT turn on time min. is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when
the ODT resistance is fully on. Both are measured from
t
AOND, which is interpreted differently per speed bin. For DDR2-400/533, tAOND is
10 ns (= 2 x 5 ns) after the clock edge that registered a first ODT HIGH if
t
CK = 5 ns.
t
AONPD
ODT turn-on (Power-Down Modes)
t
AC.MIN + 2 ns
2
t
CK + tAC.MAX + 1 ns
ns
t
AOFD
ODT turn-off delay
2.5
t
CK
t
AOF
ODT turn-off
t
AC.MIN
t
AC.MAX + 0.6 ns
ns
2)
t
AOFPD
ODT turn-off (Power-Down Modes)
t
AC.MIN + 2 ns
2.5
t
CK + tAC.MAX + 1 ns
ns
t
ANPD
ODT to Power Down Mode Entry Latency
3
—
t
CK
t
AXPD
ODT Power Down Exit Latency
8
—
t
CK
相关PDF资料 |
PDF描述 |
|---|---|
| HZ20-1 | 19.25 V, 0.5 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-35 |
| HZ6B1L | 5.65 V, 0.4 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-35 |
| HZ9.1CP | 9.65 V, 1 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE, DO-41 |
| HZB6.8MWA | 6.8 V, 0.2 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
| HZF24BPTR | 0.9 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HYS72T64000EU-2.5-B2 | 制造商:QIMONDA 制造商全称:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
| HYS72T64000EU-25F-B2 | 制造商:QIMONDA 制造商全称:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
| HYS72T64000EU-3.7-B2 | 制造商:QIMONDA 制造商全称:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
| HYS72T64000EU-3-B2 | 制造商:QIMONDA 制造商全称:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
| HYS72T64000EU-3S-B2 | 制造商:QIMONDA 制造商全称:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules |
发布紧急采购，3分钟左右您将得到回复。