参数资料
型号: HYS72T64000EP-3.7-B2
厂商: QIMONDA AG
元件分类: DRAM
英文描述: 64M X 72 DDR DRAM MODULE, DMA240
封装: GREEN, RDIMM-240
文件页数: 3/64页
文件大小: 3411K
代理商: HYS72T64000EP-3.7-B2
HYS72T[64/128/256]xx0EP–[2.5/25F/3/3S/3.7]–B2
Registered DDR2 SDRAM Modules
Internet Data Sheet
Rev. 1.02, 2008-06
11
07312007-HYD2-P177
233
DQS16
I/O
SSTL
Data Strobes Bus 17:0 and Complementary Data Strobe Bus 17:0
164
DQS17
I/O
SSTL
165
DQS17
I/O
SSTL
Data Mask
125
DM0
I
SSTL
Data Masks 8:0
The data write masks, associated with one data byte. In Write mode,
DM operates as a byte mask by allowing input data to be written if it is
LOW but blocks the write operation if it is HIGH. In Read mode, DM
lines have no effect.
Note:
×8 based module
134
DM1
I
SSTL
146
DM2
I
SSTL
155
DM3
I
SSTL
202
DM4
I
SSTL
211
DM5
I
SSTL
223
DM6
I
SSTL
232
DM7
I
SSTL
164
DM8
I
SSTL
EEPROM
120
SCL
I
CMOS
Serial Bus Clock
This signal is used to clock data into and out of the SPD EEPROM.
119
SDA
I/O
OD
Serial Bus Data
This is a bidirectional pin used to transfer data into or out of the SPD
EEPROM. A resistor must be connected from SDA to
V
DDSPD on the
motherboard to act as a pull-up.
239
SA0
I
CMOS
Serial Address Select Bus 2:0
These signals are tied at the system planar to either
V
SS or VDDSPD to
configure the serial SPD EEPROM address range
240
SA1
I
CMOS
101
SA2
I
CMOS
Parity
55
ERR_OUT
OCMOS
Parity bits
Note: Only for modules with parity bit for address and control bus. Not
connected on non-parity registered modules.
68
PAR_IN
I
CMOS
Power Supplies
1
V
REF
AI
I/O Reference Voltage
Reference voltage for the SSTL-18 inputs.
238
V
DDSPD
PWR
EEPROM Power Supply
Serial EEPROM positive power supply, wired to a separated power pin
at the connector which supports from 1.7 Volt to 3.6 Volt.
51, 56, 62, 72, 75,
78, 170, 175, 181,
191, 194
V
DDQ
PWR
I/O Driver Power Supply
Power and ground for the DDR SDRAM
53, 59, 64, 67, 69,
172, 178, 184, 187,
189, 197
V
DD
PWR
Power Supply
Power and ground for the DDR SDRAM
Pin No.
Name
Pin
Type
Buffer
Type
Function
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