参数资料
型号: IBM25PPC405GP-3DE266CZ
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266.66 MHz, RISC PROCESSOR, PBGA456
封装: 27 X 27 MM, ENHANCED, PLASTIC, BGA-456
文件页数: 35/60页
文件大小: 1480K
代理商: IBM25PPC405GP-3DE266CZ
PowerPC 405GP Embedded Processor Data Sheet
Page 40 of 60
6/20/03
SysErr
Set to 1 when a Machine Check is generated.
O
5V tolerant
3.3V LVTTL
Halt
Halt from external debugger.
I
5V tolerant
3.3V LVTTL
1, 2
GPIO1[TS1E]
GPIO2[TS2E]
General Purpose I/O
or
Even Trace execution status. To access this function, software
must toggle a DCR bit.
I/O[O]
5V tolerant
3.3V LVTTL
1, 6
GPIO3[TS1O]
General Purpose I/O
or
Odd Trace execution status. To access this function, software
must toggle a DCR bit.
I/O[O]
5V tolerant
3.3V LVTTL
1
GPIO4[TS2O]
General Purpose I/O
or
Odd Trace execution status. To access this function, software
must toggle a DCR bit.
I/O[O]
5V tolerant
3.3V LVTTL
1, 6
GPIO5:8[TS3:6]
General Purpose I/O
or
Trace status. To access this function, software must toggle a
DCR bit.
I/O[O]
5V tolerant
3.3V LVTTL
1
GPIO9[TrcClk]
General Purpose I/O
or
Trace interface clock. A toggling signal that is always half of the
CPU core frequency. To access this function, software must
toggle a DCR bit.
I/O[O]
5V tolerant
3.3V LVTTL
1
TestEn
Test Enable. Used only for manufacturing tests. Pull down for
normal operation.
I
2.5V CMOS
w/pull-down
RcvrInh
Receiver Inhibit. Used only for manufacturing tests. Pull up for
normal operation.
I
5V tolerant
3.3V LVTTL
2
DrvrInh1:2
Driver Inhibit 1 and 2. Used only for manufacturing tests. Pull up
for normal operation.
I
5V tolerant
3.3V LVTTL
2
TmrClk
An external clock input that can be used to clock the timers in the
CPU core.
I
5V tolerant
3.3V LVTTL
1
Trace Interface
[TS1E]GPIO1
[TS2E]GPIO2
Even Trace execution status. To access this function, software
must toggle a DCR bit
or
General Purpose I/O.
O[I/O]
5V tolerant
3.3V LVTTL
1, 6
Signal Functional Description (Part 7 of 8)
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 33 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 33 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Bus Control Signals” on page 33.
Signal Name
Description
I/O
Type
Notes
相关PDF资料
PDF描述
IBM25PPC405GP-3BE133C 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA456
IBM25PPC405GPR-3BA333CZ 32-BIT, 333 MHz, RISC PROCESSOR, PBGA456
IBM25PPC405GPR3DB400Z 32-BIT, 400 MHz, RISC PROCESSOR, PBGA456
IBM25PPC405GPR3BB400Z 32-BIT, 400 MHz, RISC PROCESSOR, PBGA456
IBM25PPC405GPR3DB266 32-BIT, 266 MHz, RISC PROCESSOR, PBGA456
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IBM25PPC405GP3EE200CZ 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|413PIN|PLASTIC
IBM25PPC405GP-3EE266C 制造商:未知厂家 制造商全称:未知厂家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|413PIN|PLASTIC
IBM25PPC405GP3EE266CZ 制造商:IBM 功能描述:
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