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| 型号： | ICS1893BKILF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 91/133页 |
| 文件大小： | 0K |
| 描述： | PHYCEIVER LOW PWR 3.3V 56-VQFN |
| 标准包装： | 260 |
| 系列： | PHYceiver™ |
| 类型： | PHY 收发器 |
| 规程： | MII |
| 电源电压： | 3.14 V ~ 3.47 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘 |
| 供应商设备封装： | 56-VFQFP-EP（8x8） |
| 包装： | 管件 |
| 其它名称： | 1893BKILF 800-2354-5 ICS1893BKILF-ND |
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ICS1893BF, Rev. F, 5/13/10
May, 2010
60
Chapter 7 Management Register Set
ICS1893BF Data Sheet - Release
Copyright 2009, IDT, Inc.
All rights reserved.
7.3.9 Remote Fault (bit 1.4)
An STA reads bit 1.4 to determine if a Remote Fault exists. The ICS1893BF sets bit 1.4 based on the
Remote Fault bit received from its remote link partner. The ICS1893BF receives the Remote Fault bit as
part of the Link Code Word exchanged during the auto-negotiation process. If the ICS1893BF receives a
Link Code Word from its remote link partner and the Remote Fault bit is set to:
Zero, then the ICS1893BF sets bit 1.4 to logic zero.
One, then the ICS1893BF sets bit 1.4 to logic one. In this case, the remote link partner is reporting the
detection of a fault, which typically occurs when the remote link partner is having a problem with its
receive channel.
Bit 1.4 is a latching high status bit. (For more information on latching high and latching low bits, see Section
Note: The ICS1893BF has two versions of the Remote Fault bit.
One version of the Remote Fault bit is a latching high version. An STA can access this version
through either Management Register 1 (bit 1.4) or 17 (bit 17.1). This bit 1.4/17.1 is cleared when
an STA reads either of these registers. (Bit 1.4 is identical to bit 17.1 in that they are the same
internal bit.)
Another version of the Remote Fault bit is updated whenever the ICS1893BF receives a new
Link Control Word. An STA can access this version through Management Register 5 (bit 5.13),
which like bits 1.4/17.1, also reports the status of the Remote Fault bit received from the remote
link partner. However, bit 5.13 is not a latching high bit.
The operation of both bit 1.4/17.1 and bit 5.13 are in compliance with the IEEE Std 802.3u.
7.3.10 Auto-Negotiation Ability (bit 1.3)
The STA reads bit 1.3 to determine if the ICS1893BF can support the auto-negotiation process. If the
ICS1893BF:
Cannot support the auto-negotiation process, it clears bit 1.3 to logic zero.
Can support the auto-negotiation process, it sets bit 1.3 to logic one. (For the ICS1893BF, the default
value of bit 1.3 is logic one.)
7.3.11 Link Status (bit 1.2)
The purpose of this bit 1.2 (which is also accessible through the QuickPoll Detailed Status Register, bit
17.0) is to determine if an established link is dropped, even momentarily. To indicate a link that is:
Valid, the ICS1893BF sets bit 1.2 to logic one.
Invalid, the ICS1893BF clears bit 1.2 to logic zero.
This bit is a latching low (LL) bit that the Link Monitor function controls. (For more information on latching
high and latching low bits, see Section 7.1.4.1, “Latching High Bits” and Section 7.1.4.2, “Latching Low
Bits”.) The Link Monitor function continually observes the data received by either its 10Base-T or
100Base-TX Twisted-Pair Receivers to determine the link status and stores the results in the Link Status
bit.
The criterion the Link Monitor uses to determine if a link is valid or invalid depends on the following:
Type of link
Present link state (valid or invalid)
Presence of any link errors
Auto-negotiation process
For more information on the Link Monitor Function (relative to the Link Status bit), see Section 6.5.5,
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| ICS1893BKILFT | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:PHYceiver™ 标准包装:1 系列:- 类型:线路收发器 驱动器/接收器数:5/3 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:Digi-Reel® 产品目录页面:918 (CN2011-ZH PDF) 其它名称:296-25096-6 |
| ICS1893BKIT | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:PHYceiver™ 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| ICS1893BKLF | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:PHYceiver™ 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| ICS1893BKLFT | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:PHYceiver™ 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| ICS1893BKT | 功能描述:PHYCEIVER LOW PWR 3.3V 56-VQFN RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:PHYceiver™ 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
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