参数资料
型号: ICS9148F-11
元件分类: 时钟产生/分配
英文描述: 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封装: SSOP-48
文件页数: 11/14页
文件大小: 559K
代理商: ICS9148F-11
6
ICS9148-11
Byte 1: CPU Clock Register
Select Functions
Notes:
1. REF is a test clock on the X1 inputs during test mode.
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 2: PCICLK Clock Register
Byte 4: SDRAM Clock Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
BIT
PIN# PWD
DESCRIPTION
Bit 7
-
1
Reserved
Bit 6
7
1
PCICLK_F (Act/Inact)
Bit 5
15
1
PCICLK5 (Act/Inact)
Bit 4
13
1
PCICLK4 (Act/Inact)
Bit 3
12
1
PCICLK3 (Act/Inact)
Bit 2
11
1
PCICLK2 (Act/Inact)
Bit 1
10
1
PCICLK1 (Act/Inact)
Bit 0
8
1
PCICLK0 (Act/Inact)
BIT
PIN# PWD
DESCRIPTION
Bit 7
-
1
Reserved
Bit 6
-
1
Reserved
Bit 5
-
1
Reserved
Bit 4
-
1
Reserved
Bit 3
17
1
SDRAM11 (Act/Inact)
Bit 2
18
1
SDRAM10 (Act/Inact)
Bit 1
20
1
SDRAM9 (Act/Inact)
Bit 0
21
1
SDRAM8 (Act/Inact)
BIT
PIN#
PWD
DESCRIPTION
Bit 7
-
1
Reserved
Bit 6
-
1
Reserved
Bit 5
-
1
Reserved
Bit 4
-
1
Reserved
Bit 3
40
1
CPUCLK3 (Act/Inact)
Bit 2
41
1
CPUCLK2 (Act/Inact)
Bit 1
43
1
CPUCLK1 (Act/Inact)
Bit 0
44
1
CPUCLK0 (Act/Inact)
Byte 3: SDRAM Clock Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
FUNCTION
DESCRIPTION
OUTPUTS
CPU
PCI,
PCI_F
SDRAM
REF
IOAPIC
Tri - State
Hi-ZHi-ZHi-ZHi-ZHi-Z
Test Mode
TCLK/2
1
TCLK/4
1
TCLK/2
1
TCLK
1
TCLK
1
BIT
PIN#
PWD
DESCRIPTION
Bit 7
28
1
SDRAM7 (Act/Inact)
Desktop only
Bit 6
29
1
SDRAM6 (Act/Inact)
Desktop only
Bit 5
31
1
SDRAM5 (Act/Inact)
Desktop only
Bit 4
32
1
SDRAM4 (Act/Inact)
Bit 3
34
1
SDRAM3 (Act/Inact)
Bit 2
35
1
SDRAM2 (Act/Inact)
Bit 1
37
1
SDRAM1 (Act/Inact)
Bit 0
38
1
SDRAM0 (Act/Inact)
Note: PWD = Power-Up Default
相关PDF资料
PDF描述
ICS9148F-14LF 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9148F-14 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9148F-14LF 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9148F-14 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
ICS9148F-17-LF 100.3569 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
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