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参数资料
| 型号： | IDT709279L9PFG |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 4/18页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 512KBIT 9NS 100TQFP |
| 标准包装： | 6 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，同步 |
| 存储容量： | 512K (32K x 16) |
| 速度： | 9ns |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 托盘 |
IDT709279/69S/L
High-Speed 32/16K x 16 Synchronous Dual-Port Static RAM
Truth Table II—Address Counter Control (1,2)
Preliminary
Industrial and Commercial Temperature Ranges
Previous
Internal
External
Address
An
Internal
Address
X
Address
Used
An
CLK
↑
ADS
L (4)
CNTEN
X
CNTRST
H
I/O (3)
D I/O (n)
External Address Used
MODE
X
An
An + 1
↑
H
L
(5)
H
D I/O (n+1)
Counter Enabled —Internal Address generation
X
X
An + 1
X
An + 1
A 0
↑
↑
H
X
H
X
H
L (4)
D I/O (n+1)
D I/O (0)
External Address Blocked —Counter disabled (An + 1 reused)
Counter Reset to Address 0
NOTES:
1. "H" = V IH, "L" = V IL, "X" = Don't Care.
2. CE 0 , LB , UB , and OE = V IL ; CE 1 and R/ W = V IH .
3. Outputs configured in Flow-Through Output mode: if outputs are in Pipelined mode the data out will be delayed by one cycle.
4. ADS is independent of all other signals including CE 0 , CE 1 , UB and LB .
5. The address counter advances if CNTEN = V IL on the rising edge of CLK, regardless of all other signals including CE 0 , CE 1 , UB and LB .
3243 tbl 03
Recommended Operating
Temperature and Supply Voltage
(1)
Recommended DC Operating
Conditions
Grade
Ambient
GND
V CC
Symbol
Parameter
Min.
Typ.
Max.
Unit
Temperature
V CC
Supply Voltage
4.5
5.0
5.5
V
6.0
Commercial
Industrial
0 O C to +70 O C
-40 O C to +85 O C
0V
0V
5.0V + 10%
5.0V + 10%
GND
V IH
Ground
Input High Voltage
0
2.2
0
____
0
(1)
V
V
3243 tbl 04
-0.5
NOTES:
V IL
Input Low Voltage
(2)
____
0.8
V
1. This is the parameter T A . This is the "instant on" case temperature.
NOTES:
1. V TERM must not exceed V CC + 10%.
2. V IL > -1.5V for pulse width less than 10ns.
3243 tbl 05
Absolute Maximum Ratings (1)
Symbol Rating Commercial
& Industrial
Unit
Capacitance (1)
(T A = +25°C, f = 1.0MH z )
Symbol Parameter
Conditions (2)
Max.
Unit
V TERM
(2)
Terminal Voltage
with Respect
-0.5 to +7.0
V
C IN
Input Capacitance
V IN = 0V
9
pF
C OUT
to GND
(2)
Output Capacitance
V OUT = 0V
10
pF
T BIAS
TemperatureUnder Bias
-55 to +125
o
C
3243 tbl 07
NOTES:
T STG
T JN
Storage Temperature
Junction Temperature
-65 to +150
+150
o
o
C
C
1. These parameters are determined by device characterization, but are not
production tested.
2. C OUT also references C I/O .
I OUT
DC Output Current
50
mA
3243 tbl 06
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2. V TERM must not exceed V CC + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of V TERM > V CC + 10%.
3. Ambient Temperature Under Bias. No AC Conditions. Chip Deselect.
6.42
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