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参数资料
| 型号： | IP1206TRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 20/30页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 30A/15A LGA |
| 产品变化通告： | (EP) Parts Discontinuation 25/May/2012 |
| 标准包装： | 750 |
| 系列： | iPOWIR™ |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 或 2 |
| 输出电压： | 0.8 V ~ 5.5 V |
| 输入电压： | 7.5 V ~ 14.5 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 600kHz |
| 电流 - 输出： | 30A，15A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-BFLGA |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 36-LGA（9.25x15.5） |
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i P1206PbF
Feedback Compensation
The iP1206 is a voltage mode controller; the control
loop is a single voltage feedback path including
V OUT
F ESR =
1
2 ? π * ESR * C o
- - - -(13)
error amplifier and error comparator. To achieve
fast transient response and accurate output
regulation, a compensation circuit is necessary. The
goal of the compensation network is to provide a
closed loop transfer function with the highest 0dB
crossing frequency and adequate phase margin
(greater than 45 o ).
R 6 F b
R 5
V REF
E/A
Comp
C 9
R 4
Ve
C POLE
The output LC filter introduces a double pole, –
40dB/decade gain slope above its corner resonant
frequency, and a total phase lag of 180 o (see Fig.
20). The resonant frequency of the LC filter
expressed as follows:
Gain(dB)
H(s) dB
F Z
F LC =
1
2 ? π L o ? C o
- - - -(12)
Frequency
Fig. 21: TypeII compensation network
Since we already have
180 o
phase shift just from
and its asymptotic gain plot
the output filter, the system risks being unstable.
The transfer function (Ve/Vo) is given by:
H ( s ) = ? ? g m *
R 5 ? 1 + sR 4 C 9
R 5 6 ? ?
Gain
0dB
Phase
0
?
?
+ R sC 9
? *
- - - -(14)
-40dB/decade
The (s) indicates that the transfer function varies as
a function of frequency. This configuration
introduces a gain and zero, expressed by:
[ H ( s ) ] = ? ? g m *
? * R 4
F z =
- - - -(16)
-180
F LC Frequency F LC Frequency
Fig. 20: Gain and Phase of LC filter
The iP1206’s error amplifier is a differential-input
? R 5 ?
?
? R 5 + R 6 ?
1
2 π * R 4 * C 9
- - - -(15)
transconductance amplifier. The output is available
for DC gain control or AC phase compensation.
The E/A can be compensated either in type II or
The gain is determined by the voltage divider and
E/A’s transconductance gain.
First select the desired zero-crossover frequency
type III compensation. When it is used in type II
compensation the transconductance properties of
the E/A become evident and can be used to cancel
(Fo):
F o > F ESR and F o ≤ ( 1/5 ~ 1/10 ) * F s
one of the output filter poles. This will be
Use the following equation to calculate R 4 :
R 4 =
V in LC * R 5 * g m
* F
accomplished with a series RC circuit from Comp
pin to ground as shown in Fig. 21.
This method requires that the output capacitor
should have enough ESR to satisfy stability
requirements. In general the output capacitor’s ESR
generates a zero typically at 5kHz to 50kHz which is
V osc * F o * F ESR * ( R 5 + R 6 )
2
Where:
V in = Maximum Input Voltage
V osc = Oscillator Ramp Voltage
F o = Crossover Frequency
- - - -(17)
essential for an acceptable phase margin. The ESR
zero of the output capacitor expressed as follows:
F ESR = Zero Frequency of the Output Capacitor
F LC = Resonant Frequency of the Output Filter
g m = Error Amplifier Transconductance
www.irf.com
2/26/2008
20
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