参数资料
型号: IP1206TRPBF
厂商: International Rectifier
文件页数: 6/30页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 30A/15A LGA
产品变化通告: (EP) Parts Discontinuation 25/May/2012
标准包装: 750
系列: iPOWIR™
类型: 降压(降压)
输出类型: 可调式
输出数: 1 或 2
输出电压: 0.8 V ~ 5.5 V
输入电压: 7.5 V ~ 14.5 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 600kHz
电流 - 输出: 30A,15A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 36-BFLGA
包装: 带卷 (TR)
供应商设备封装: 36-LGA(9.25x15.5)

i P1206PbF
Pin Description
Pin Number
1
2
3
4, 6, 13, 15
5
7
8
9
10
11
12
14
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Pin Name
CC2
SS2
VIN2
PGND
VSW2
VCB2
OC2
VCH
VCL
OC1
VCB1
VSW1
VIN1
SS1
CC1
FB1
FB1S
SEQ
SYNC
PGOOD2
VP1
VP2
VREF
PGOOD1
VCC
VO3
TRACK
ENABLE
NC
RT
FB2S
FB2
AGND
Description
Compensation pin for Error Amplifier 2
Soft Start/Shutdown pin for output 2
Input supply voltage connection to output 2
Power Ground
Voltage Switching Node for output 2 – pin connection to the output inductor
Boot strap capacitor pin for output 2 - connect a 0.1μF from this pin to VSW2
Over current threshold setting pin for output 2
Supply voltage for internal high side FET drivers of both outputs
Supply voltage for internal low side FET drivers of both outputs
Over current threshold setting pin for output 1
Boot strap capacitor pin for output 1 - connect a 0.1μF from this pin to VSW1
Voltage Switching Node for output 1 – pin connection to the output inductor
Input supply voltage connection to output 1
Soft Start/Shutdown pin for output 1
Compensation pin for Error Amplifier 1
Inverting input for Error Amplifier 1
Output over voltage protection sense pin for output 1
Sequence Enable pin
External clock synchronization pin – when not in use, leave pin floating
Power Good status pin of output 2 – output is open collector
Non-inverting input of error amplifier 1
Non-inverting input of error amplifier 2
Internal voltage reference pin - connect a 100pF from this pin to AGND
Power Good status pin of output 1 – output is open collector
Input supply voltage of internal control IC - connect a 1.0μF from this pin to AGND
Output of internal regulator used to supply VCH – connect a 1.0μF from this pin to PGND
Secondary non-inverting input to Error Amplifier 2 – used to set the type of power up/down
sequence of the output voltages
Master enable pin. Recycling this pin will reset OV, SS, and Pre-Bias latch for both outputs.
No connect. This pin is not for electrical connection.
Switching frequency setting pin
Output over voltage protection sense pin for output 2
Inverting input for Error Amplifier 2
Analog Ground
www.irf.com
2/26/2008
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