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| 型号： | IR22141SSPBF |
| 厂商： | International Rectifier |
| 文件页数： | 14/34页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER HALF BRIDGE SGL 24SSOP |
| 标准包装： | 55 |
| 配置： | 半桥 |
| 输入类型： | 非反相 |
| 延迟时间： | 440ns |
| 电流 - 峰： | 2A |
| 配置数： | 1 |
| 输出数： | 2 |
| 高端电压 - 最大（自引导启动）： | 1200V |
| 电源电压： | 11.5 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 管件 |
| 配用： | IRMD2214SS-ND - KIT DESIGN EVAL BOARD IR2214SS IRMD22141SS-ND - KIT DESIGN EVAL BOARD/IR22141SS |
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IR21141/IR22141SSPbF
driver to detect and turn-off the desaturated transistor
with the integrated soft shutdown (SSD) protection.
FAULT
As with a normal SSD sequence, during SSD the
SY_FLT output pin (active low, see Fig. 14) will report
SY_FLT
FAULT/SD
VCC
LIN
HIN
FLT_CLR
VSS
VB
HOP
HON
SSH
DSH
VS
LOP
LON
SSL
DSL
COM
SY_FLT
FAULT/SD
VCC
LIN
HIN
FLT_CLR
VSS
VB
HOP
HON
SSH
DSH
VS
LOP
LON
SSL
DSL
COM
SY_FLT
FAULT/SD
VCC
LIN
HIN
FLT_CLR
VSS
VB
HOP
HON
SSH
DSH
VS
LOP
LON
SSL
DSL
COM
the gate driver status. But now, being the FLT_CLR pin
already active, the gate driver will not generate a FAULT
signal by activating the FAULT/SD pin and it will not
enter hard shutdown.
To prevent the driver to resume charging the bootstrap
capacitor, therefore re-establishing the condition that will
phase U
phase V
phase W
determine again the occurrence of the large current
increas e in the IGBT, it is recommended to monitor the
Figure 15: IR22141 used in a 3 phase application
SY_FLT: The bi-directional SY_FLT pins communicate
each other through a local network. The logic signal is
active low. The device that detects the IGBT
desaturation activates the SY_FLT, which is then read
by the other gate drivers. When SY_FLT is active all the
drivers hold their output state regardless of the input
signals (H IN , L IN ) they receive from the controller (freeze
state). This feature is particularly important in phase-to-
phase short circuit where two IGBTs are involved; in
fact, while one is softly shutting-down, the other must be
prevented from hard shutdown to avoid exiting SSD. In
the freeze state, the frozen drivers are not completely
inactive because desaturation detection still takes the
highest priority. SY_FLT communication has been
designed for creating a local network between the
drivers.
FAULT/SD: The bi-directional FAULT/SD pins
communicate with each other and with the system
controller. The logic signal is active low. When low, the
FAULT/SD signal commands the outputs to go off by
hard shutdown. There are three events that can force
FAULT/SD low:
SY_FLT output pin. Should the SY_FLT output pin go
low during the start-up sequence, the controller must
interpret a power inverter failure is present, and stop the
start-up sequence.
1.5 Active Bias
For the purpose of sensing the power transistor
desaturation, the collector voltage is monitored (an
external high voltage diode is connected between the
IGBT’s collector and the IC’s DSH or DSL pin). The
diode is normally biased by an internal pull up resistor
connected to the local supply line (V B or V CC ). When the
transistor is “on” the diode is conducting and the amount
of current flowing in the circuit is determined by the
internal pull up resistor value.
In the high side circuit, the desaturation biasing current
may become relevant for dimensioning the bootstrap
capacitor (see Fig. 19). In fact, a pull up resistor with a
low resistance may result in a high current that
significantly discharges the bootstrap capacitor. For that
reason, the internal pull up resistor typical value is of the
order of 100 k .
While the impedance of the DSH/DSL pins is very low
when the transistor is on (low impedance path through
1.
2.
3.
Desaturation detection event: the FAULT/SD
pin is latched low when SSD is over, and only a
FLT_CLR signal can reset it;
Undervoltage on V CC : the FAULT/SD pin is
forced low and held until the undervoltage is
active. Thi s event is not latched;
FAULT/SD is externally driven low either from
the controller or from another IR21141/IR22141
device. This event is not latched; therefore the
the external diode down to the power transistor), the
impedance is only controlled by the pull up resistor when
the transistor is off. In that case, relevant dV/dt applied
by the power transistor during the commutation at the
output results in a considerable current injected through
the stray capacitance of the diode into the desaturation
detection pin (DSH/DSL). This coupled noise may be
easily reduced by using an active bias structure for the
sensing diode.
FLT_CLR cannot disable it. Only when
FAULT/SD becomes high the device returns to
its normal operating mode.
1.4.5 Fault Management at Start-up
When the bootstrap supply topology is used for
supplying the floating high side and the recommended
power supply start-up sequence is followed, FLT_CLR
pin must be kept active to prevent spurious diagnostic
signals being generated.
In the event of power inverter failure already present or
occurring during start-up (phase and/or rail supply short-
circuit, overload conditions induced by the load, etc.),
keeping the FLT_CLR pin active will also p revent the
real fault condition to be detected with the FAULT/SD
pin. In such a condition a large current increase in the
IGBT will desaturate the transistor, allowing the gate
www.irf.com
14
In IR21141/IR22141 the DSH/DSL pins integrate an
active pull-up structure respectively to V B /V CC, and a pull-
down structure to V S /COM.
The dedicated biasing circuit reduces the impedance on
the DSH/DSL pin when the voltage exceeds the V DESAT
threshold (see Fig. 16). This low impedance helps
rejecting the noise current injected by the parasitic
capacitance. When the power transistor is fully on, the
sensing diode is forward biased and the voltage at the
DSH/DSL pin decreases. At this point the biasing circuit
deactivates, to reduce the bias current of the diode as
shown in Fig. 16.
In certain switching conditions (short pulses, high
temperature) the recovery current of the external de-
saturation sensing diode might reach levels beyond the
capability of the active bias circuit. In order to avoid
malfunctions and damage for the IC an external Schottky
? 2009 International Rectifier
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| IR22141SSPBF | 制造商:International Rectifier 功能描述:Driver IC |
| IR22141SSTRPBF | 功能描述:功率驱动器IC Hlf Brdg Drvr IC for Pwr Swtch App RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| IR2214SS | 功能描述:IC DRIVER HALF BRIDGE SGL 24SSOP RoHS:否 类别:集成电路 (IC) >> PMIC - MOSFET，电桥驱动器 - 外部开关 系列:- 标准包装:50 系列:- 配置:高端 输入类型:非反相 延迟时间:200ns 电流 - 峰:250mA 配置数:1 输出数:1 高端电压 - 最大（自引导启动）:600V 电源电压:12 V ~ 20 V 工作温度:-40°C ~ 125°C 安装类型:通孔 封装/外壳:8-DIP（0.300"，7.62mm） 供应商设备封装:8-DIP 包装:管件 其它名称:*IR2127 |
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| IR2214SSPBF | 制造商:International Rectifier 功能描述:Driver IC |
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