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参数资料
| 型号： | IR3503MTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 21/39页 |
| 文件大小： | 0K |
| 描述： | IC CTRL XPHASE VR11.0/1 32-MLPQ |
| 标准包装： | 1 |
| 系列： | XPhase3™ |
| 应用： | 处理器 |
| 电流 - 电源： | 8mA |
| 电源电压： | 4.75 V ~ 7.5 V |
| 工作温度： | 0°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-MLPQ（5x5） |
| 包装： | 标准包装 |
| 其它名称： | IR3503MTRPBFDKR |
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IR3503
respect to the load current can be adjusted with the resistors RTCMP2 and RTCMP3. The IMON signal is clamped
at 1.03V in order to facilitate direct interfacing with the CPU.
Control IC
VDAC
Buffer
+
VDAC
-
100k
200k
-
VDRP
Buffer
Thermal
Comp
+
IIN
From Phase ICs
RTCMP1
RTHERM
Amplifier
+
VDRP
-
RTCMP2
VN
RTCMP3
DAC_BUFF
200k
200k
-
1.03
IMON
VDRP
200k
+
0
200k
50mV
Figure 12: Current Report Signal (IMON) implementation
Power State Indicator (PSI#)
PSI# is an active low input logic signal to IR3503 sent by the CPU. The PSI# signal will be asserted (low) whenever
the CPU enters low power state. IR3503 uses this signal to improve the efficiency of the voltage regulator (VR) by
turning off a few phases under light load conditions. A single PSI# bus is hard wired to all the phase ICs. Once,
PSI# is asserted (low), IR3503 waits for 7 CLKOUT cycles and then registers the active number of phases at that
instant. The phase IC (IR3529) waits for 8 PHSIN cycles after PSI# assertion to shut the phase off and then issues
a down SHIFT signal. On PSI# de-assertion, IR3503 cranks the CLKOUT frequency (corresponding to the number
of phases active before PSI# assertion) once it receives an up SHIFT signal from the phase ICs. The first phase in
the daisy chain should be always on during PSI mode of operation. The system design should also ensure that the
VR is not forced into PSI mode of operation within 8 switching cycles after a phase shed event.
SHIFT Signal Implementation:
The SHIFT function is used to communicate the status change of the phase ICs in order to improve the daisy chain
timing. The main objective is to minimize the output voltage deviation when phases are taken into or out of the daisy
chain loop. The SHIFT signal rides on
V CCL
2
and is pulled up to VCCL to indicate an up shift in CLK frequency
(insertion of phases) and is pulled down to LGND to indicate a down shift in CLK frequency (phase shedding
operation). Changes in the number of phases in the system may occur due to the following operations:
?
?
?
Active or Dynamic Shedding: This is a post-power up event when phases are shut down based on the load
requirements. Such an operation will lead to perturbations in the output voltage.
Static Shedding: This may occur prior to power supply turn-on as long as phases are not de-shed post-power
up. Since, this occurs when the power supply is turned off and hence does not affect the output voltage.
PSI# assertion or de-assertion: This is mostly a dynamic event and it will affect the output voltage. The
maximum permissible deviation in output voltage is slightly higher during such events.
Page 21 of 39
February 12, 2010
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3504MPBF | 制造商:International Rectifier 功能描述:Control IC 32-Pin MLPQ Strip |
| IR3504MTRPBF | 功能描述:开关变换器、稳压器与控制器 X-PHASE IR3504 AMD SVID CTRL IC RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
| IR3505 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM PHASE IC |
| IR3505MPBF | 功能描述:IC XPHASE3 CONTROL 16-MLPQ RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:XPhase3™ 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| IR3505MTRPBF | 功能描述:开关变换器、稳压器与控制器 XPHASE3 DDR VTT 7V 2A 3 Wire RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
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