参数资料
型号: IR3503MTRPBF
厂商: International Rectifier
文件页数: 8/39页
文件大小: 0K
描述: IC CTRL XPHASE VR11.0/1 32-MLPQ
标准包装: 1
系列: XPhase3™
应用: 处理器
电流 - 电源: 8mA
电源电压: 4.75 V ~ 7.5 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-MLPQ(5x5)
包装: 标准包装
其它名称: IR3503MTRPBFDKR
IR3503
PIN DESCRIPTION
PIN#
1-8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
PIN SYMBOL
VID7-0
ENABLE
VRHOT
HOTSET
VOSEN-
VOSEN+
VO
FB
EAOUT
VDRP
VN
VDAC_BUFF
VSETPT
VDAC
SS/DEL
ROSC
PSI#
CLKOUT
PHSOUT
PHSIN
VCCL
IIN
SHIFT
VRRDY
IMON
EXPAD
PIN DESCRIPTION
Inputs to VID D to A Converter.
Enable input. A logic low applied to this pin puts the IC into fault mode. Do not float
this pin as the logic state will be undefined.
Open collector output of the VRHOT comparator which drives low if HOTSET pin
voltage is lower than 1.6V. Connect external pull-up.
A resistor divider including thermistor senses the temperature, which is used for
VRHOT comparator.
Remote sense amplifier input. Connect to ground at the load.
Remote sense amplifier input. Connect to output at the load.
Remote sense amplifier output.
Inverting input to the Error Amplifier.
Output of the error amplifier.
Buffered, scaled and thermally compensated IIN signal. Connect an external RC
network to FB to program converter output impedance.
Node for DCR thermal compensation network.
Buffered VDAC.
Error amplifier non-inverting input. Converter output voltage can be decreased from
the VDAC voltage with an external resistor connected between VDAC and this pin
(there is an internal sink current at this pin).
Regulated voltage programmed by the VID inputs. Connect an external RC network
to LGND to program dynamic VID slew rate and provide compensation for the
internal buffer amplifier.
Programs converter startup and over current protection delay timing. It is also used
to compensate the constant output current loop during soft start. Connect an
external capacitor to LGND to program.
Connect a resistor to LGND to program oscillator frequency and OCSET, VSETPT
and VDAC bias currents. Oscillator frequency equals switching frequency per phase.
The pin voltage is 0.6V during normal operation.
Digital Power State Indicator input, active low.
Clock output at switching frequency multiplied by phase number. Connect to CLKIN
pins of phase ICs.
Phase clock output at switching frequency. Connect to PHSIN pin of first phase IC.
Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.
Voltage regulator and IC power input. Connect a decoupling capacitor to LGND.
Average current input from the phase IC(s). This pin is also used to communicate
over voltage condition to phase ICs.
Communication input from phase IC(s) statically floats at VCCL/2. Momentarily
pulling pin up to VCCL indicates a phase has entered the daisy chain loop resulting
in an up-shift in the CLKOUT frequency. Momentarily pulling down to ground
indicates a loss of a phase and down-shifts the CLKOUT frequency.
Open collector output that drives low during startup and under any external fault
condition. Indicates converter within regulation. Connect external pull-up.
Voltage at IOUT pin will be proportional to load current.
Exposed pad located underneath the IC. Local Ground for internal circuitry and IC
substrate connection.
Page 8 of 39
February 12, 2010
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