参数资料
型号: IR3522MTRPBF
厂商: International Rectifier
文件页数: 3/32页
文件大小: 0K
描述: IC CTRL XPHASE3 DDR/VVT 32-MLPQ
标准包装: 3,000
系列: XPhase3™
应用: 处理器
电流 - 电源: 7mA
电源电压: 4.75 V ~ 7.5 V
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-MLPQ(5x5)
包装: 带卷 (TR)
IR3522
PIN#
21
22
23
24
25
26
27
28
29
30
31
32
PIN SYMBOL
IIN1
CROWBAR
ROSC
LGND
CLKOUT
PHSOUT
PHSIN
VCCL
VID0
VID1
PGOOD
SCL
PIN DESCRIPTION
Output 1 average current input from the output 1 phase IC(s). This pin is also used
to initialize Diode Emulation Mode in the phase IC(s).
Drives NMOS crowbar devices at VTT and VDDR rails.
Connect a resistor to LGND to program oscillator frequency and OCSET1, OCSET2,
and VREF bias currents. Oscillator frequency equals switching frequency per phase.
The pin voltage is 0.6V during normal operation.
Local Ground for internal circuitry and IC substrate connection.
Clock output at switching frequency multiplied by phase number. Connect to CLKIN
pins of phase ICs.
Phase clock output at switching frequency per phase. Connect to PHSIN pin of the
first phase IC.
Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.
Output of the voltage regulator, and power input for clock oscillator circuitry. Connect
a decoupling capacitor to LGND.
Digital input to program one of four power-up VREF1 VDD reference values.
Connect to LGND for logic “0”, float for logic “1”
Digital input to program one of four power-up VREF1 VDD reference values.
Connect to LGND for logic “0”, float for logic “1”
Open collector output that drives low during startup and under any external fault
condition. The Power Good function also monitors output voltages and this pin will
drive low if any of the voltage planes are outside of the specified limits. Connect
external pull-up.
SCL (Serial Clock) is an open drain output of the I 2 C controller and input to IR3522.
This pin requires an external bias voltage and should not be floated.
Page 3
V3.01
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