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| 型号： | IS61LPS25636A-250TQ |
| 厂商： | INTEGRATED SILICON SOLUTION INC |
| 元件分类： | SRAM |
| 英文描述： | 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM |
| 中文描述： | 256K X 36 CACHE SRAM, 2.6 ns, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 14/35页 |
| 文件大小： | 562K |
| 代理商： | IS61LPS25636A-250TQ |
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Integrated Silicon Solution, Inc.
21
Rev. I
01/13/09
IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A,
IS61VPS51218A, IS61VPS25636A
IEEE 1149.1 SERIAL BOUNDARY SCAN (JTAg)
TheIS61LPS/VPSxxxxxxproductshaveaserialboundary
scanTestAccessPort(TAP)inthePBGApackageonly.
(TheTQFPpackagenotavailable.)Thisportoperatesin
accordance with IEEEStandard1149.1-1900,butdoesnot
includeallfunctionsrequiredforfull1149.1compliance.
ThesefunctionsfromtheIEEEspecificationareexcluded
because they place added delay in the critical speed path
oftheSRAM.TheTAPcontrolleroperatesinamannerthat
does not conflict with the performance of other devices us-
ing1149.1fullycompliantTAPs.TheTAPoperatesusing
JEDECstandard2.5VI/Ologiclevels.
DISABLINg THE JTAg FEATURE
TheSRAMcanoperatewithoutusingtheJTAGfeature.
To disable the TAP controller, TCK must be tied LOW
(Vss)topreventclockingofthedevice.TDIandTMSare
internallypulledupandmaybedisconnected.Theymay
alternatelybeconnectedtoVddthroughapull-upresistor.
TDOshouldbeleftdisconnected.Onpower-up,thedevice
will start in a reset state which will not interfere with the
device operation.
TEST ACCESS PORT (TAP) - TEST CLOCK
ThetestclockisonlyusedwiththeTAPcontroller.Allinputs
arecapturedontherisingedgeofTCKandoutputsare
drivenfromthefallingedgeofTCK.
TEST MODE SELECT (TMS)
TheTMS input is used to send commands to theTAP
controllerandissampledontherisingedgeofTCK.This
pinmaybeleftdisconnectediftheTAPisnotused.Thepin
isinternallypulledup,resultinginalogicHIGHlevel.
TEST DATA-IN (TDI)
TheTDI pin is used to serially input information to the
registers and can be connected to the input of any regis-
ter.TheregisterbetweenTDIandTDOischosenbythe
instruction loaded into theTAP instruction register. For
informationoninstructionregisterloading,seetheTAP
ControllerStateDiagram.TDIisinternallypulledupand
canbedisconnectediftheTAPisunusedinanapplica-
tion.TDIisconnectedtotheMostSignificantBit(MSB)
on any register.
31 30 29
. . . 2 1 0
2
1
0
x
. . . . . 2 1 0
Bypass Register
Instruction Register
Identification Register
Boundary Scan Register*
TAP CONTROLLER
Selection Circuitry
TDO
TDI
TCK
TMS
TAP CONTROLLER BLOCK DIAgRAM
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IS61LPS25636A-250TQI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM |
| IS61LPS25636B-200TQLI | 功能描述:IC SRAM 9MBIT 200MHZ 100LQFP 制造商:issi, integrated silicon solution inc 系列:- 包装:托盘 零件状态:在售 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:9M（256K x 36） 速度:200MHz 接口:并联 电压 - 电源:3.135 V ~ 3.465 V 工作温度:-40°C ~ 85°C（TA） 封装/外壳:100-LQFP 供应商器件封装:100-LQFP（14x20） 标准包装:72 |
| IS61LPS25672A | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM |
| IS61LPS25672A-250B1 | 功能描述:静态随机存取存储器 18Mb 256Kx72 250MHz Sync 静态随机存取存储器 3.3v RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| IS61LPS25672A-250B1I | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM |
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