参数资料
型号: ISD4003-08MSI
厂商: WINBOND ELECTRONICS CORP
元件分类: 音频合成
英文描述: 480 SEC, SPEECH SYNTHESIZER WITH RCDG, PDSO28
封装: 0.1200 INCH, PLASTIC, SOIC-28
文件页数: 19/37页
文件大小: 392K
代理商: ISD4003-08MSI
26
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
zero, setting EEWE will have no effect. When EEMWE has been written to one by software, hardware clears the bit
to zero after four clock cycles. See the description of the EEWE bit for an EEPROM write procedure.
Bit 1 – EEWE: EEPROM Write Enable
The EEPROM Write Enable Signal EEWE is the write strobe to the EEPROM. When address and data are cor-
rectly set up, the EEWE bit must be written to one to write the value into the EEPROM. The EEMWE bit must be
written to one before a logical one is written to EEWE, otherwise no EEPROM write takes place.
Bit 0 – EERE: EEPROM Read Enable
The EEPROM Read Enable Signal EERE is the read strobe to the EEPROM. When the correct address is set up in
the EEAR Register, the EERE bit must be written to a logic one to trigger the EEPROM read. The EEPROM read
access takes one instruction, and the requested data is available immediately. When the EEPROM is read, the
CPU is halted for four cycles before the next instruction is executed.
8.6.5
GPIOR2 – General Purpose I/O Register 2
8.6.6
GPIOR1 – General Purpose I/O Register 1
8.6.7
GPIOR0 – General Purpose I/O Register 0
Bit
7654
321
0
0x2B (0x4B)
MSB
LSB
GPIOR2
Read/Write
R/W
Initial Value
0000
000
0
Bit
7654
321
0
0x2A (0x4A)
MSB
LSB
GPIOR1
Read/Write
R/W
Initial Value
0000
000
0
Bit
7654
321
0
0x1E (0x3E)
MSB
LSB
GPIOR0
Read/Write
R/W
Initial Value
0000
000
0
相关PDF资料
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ISD4003-04MZD 240 SEC, SPEECH SYNTHESIZER WITH RCDG, PBGA19
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