参数资料
型号: ISL6236EVAL2
厂商: Intersil
文件页数: 19/35页
文件大小: 0K
描述: EVAL BOARD 2 FOR ISL6236
标准包装: 1
系列: *
ISL6236
Typical Performance Curves
LGATE1 5V/DIV
Circuit of Figures 66, 67 and 68, no load on LDO, OUT1, OUT2, V REF3 , and REF, V IN = 12V,
EN2 = EN1 = VCC, V BYP = 5V, PVCC = 5V, V EN LDO = 5V, T A = -40°C to +100°C, unless
otherwise noted. Typical values are at T A = +25°C. (Continued)
LGATE2 5V/DIV
V OUT1 RIPPLE 20mV/DIV
V OUT1 RIPPLE 50mV/DIV
IL1 5A/DIV
V OUT2 RIPPLE 20mV/DIV
FIGURE 63. LOAD TRANSIENT V OUT1 = 1.5V (SKIP)
IL1 5A/DIV
V OUT2 RIPPLE 20mV/DIV
FIGURE 64. LOAD TRANSIENT V OUT1 = 1.05V (PWM)
LGATE2 5V/DIV
V OUT1 RIPPLE 20mV/DIV
IL2 5A/DIV
V OUT2 RIPPLE 20mV/DIV
FIGURE 65. LOAD TRANSIENT V OUT1 = 1.05V (SKIP)
Typical Application Circuits
The typical application circuits (Figures 66, 67 and 68)
generate the 5V/7A, 3.3V/11A, 1.25V/5A, dynamic voltage/10A,
1.5V/5A, 1.05V/5A and external 14V charge pump main
supplies in a notebook computer. The ISL6236 is also equipped
with a secondary feedback, SECFB, used to monitor the output
of the 14V charge pump. In an event when the 14V drops
below its threshold voltage, SECFB comparator will turn on
LGATE1 for 300ns. This will refresh an external 14V charge
pump without overcharging the output voltage. The input supply
range is 5.5V to 25V.
Detailed Description
The ISL6236 dual-buck, BiCMOS, switch-mode
power-supply controller generates logic supply voltages for
notebook computers. The ISL6236 is designed primarily for
battery-powered applications where high efficiency and
low-quiescent supply current are critical. The ISL6236
19
provides a pin-selectable switching frequency, allowing
operation for 200kHz/300kHz, 400kHz/300kHz, or
400kHz/500kHz on the SMPSs.
Light-load efficiency is enhanced by automatic Idle-Mode
operation, a variable-frequency pulse-skipping mode that
reduces transition and gate-charge losses. Each step-down,
power-switching circuit consists of 2 N-channel MOSFETs, a
rectifier, and an LC output filter. The output voltage is the
average AC voltage at the switching node, which is
regulated by changing the duty cycle of the MOSFET
switches. The gate-drive signal to the N-channel high-side
MOSFET must exceed the battery voltage, and is provided
by a flying-capacitor boost circuit that uses a 100nF
capacitor connected to BOOT.
Both SMPS1 and SMPS2 PWM controllers consist of a
triple-mode feedback network and multiplexer, a multi-input
PWM comparator, high-side and low-side gate drivers and
FN6373.6
April 29, 2010
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