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参数资料
| 型号： | ISL6236EVAL2 |
| 厂商： | Intersil |
| 文件页数： | 28/35页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 2 FOR ISL6236 |
| 标准包装： | 1 |
| 系列： | * |
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ISL6236
where:
5V
? PVCC is 5V
BOOT
10 Ω
VIN
? C GS is the gate capacitance of the high-side MOSFET
UGATE
C BOOT
Q1
OUT
Boost-Supply Refresh Monitor
In pure skip mode, the converter frequency can be very low
with little to no output loading. This produces very long off
times, where leakage can bleed down the BOOT capacitor
ISL6236
V GS ( MIN ) = PVCC ? ---------------------------------------
C BOOT
PHASE
ISL88732
ISL88733
ISL6236
ISL88734
FIGURE 75. REDUCING THE SWITCHING-NODE RISE TIME
The internal pull-down transistors that drive LGATE low have
a 0.6 Ω typical ON-resistance. These low ON-resistance
pull-down transistors prevent LGATE from being pulled up
during the fast rise time of the inductor nodes due to
capacitive coupling from the drain to the gate of the low-side
synchronous-rectifier MOSFETs. However, for high-current
applications, some combinations of high- and low-side
MOSFETs may cause excessive gate-drain coupling, which
leads to poor efficiency and EMI-producing shoot-through
currents. Adding a 1 Ω resistor in series with BOOT
increases the turn-on time of the high-side MOSFETs at the
expense of efficiency, without degrading the turn-off time
(Figure 75).
Adaptive dead-time circuits monitor the LGATE and UGATE
drivers and prevent either FET from turning on until the other is
fully off. This algorithm allows operation without shoot-through
with a wide range of MOSFETs, minimizing delays and
maintaining efficiency. There must be low resistance, low
inductance paths from the gate drivers to the MOSFET gates
for the adaptive dead-time circuit to work properly. Otherwise,
the sense circuitry interprets the MOSFET gate as "off" when
there is actually charge left on the gate. Use very short, wide
traces measuring 10 to 20 squares (50 mils to 100 mils wide if
the MOSFET is 1” from the device).
Boost-Supply Capacitor Selection (Buck)
The boost capacitor should be 0.1μF to 4.7μF, depending on
the input and output voltages, external components, and PC
board layout. The boost capacitance should be as large as
possible to prevent it from charging to excessive voltage, but
small enough to adequately charge during the minimum
low-side MOSFET conduction time, which happens at
maximum operating duty cycle (this occurs at minimum input
voltage). The minimum gate to source voltage (V GS(MIN) ) is
determined by:
(EQ. 5)
C BOOT + C GS
28
voltage. If the voltage falls too low, the converter may not be
able to turn on UGATE when the output voltage falls to the
reference. To prevent this, the ISL6236 monitors the BOOT
capacitor voltage, and if it falls below 3V, it initiates an
LGATE pulse, which will refresh the BOOT voltage.
POR, UVLO and Internal Digital Soft-Start
Power-on reset (POR) occurs when VIN rises above
approximately 3V, resetting the undervoltage, overvoltage,
and thermal-shutdown fault latches. PVCC
undervoltage-lockout (UVLO) circuitry inhibits switching
when PVCC is below 4V. LGATE is low during UVLO. The
output voltages begin to ramp up once PVCC exceeds its 4V
UVLO and REF is in regulation. The internal digital soft-start
timer begins to ramp up the maximum-allowed current limit
during start-up. The 1.7ms ramp occurs in five steps. The
step size are 20%, 40%, 60%, 80% and 100% of the positive
current limit value.
Power-Good Output (POK)
The POK comparator continuously monitors both output
voltages for undervoltage conditions. POK is actively held
low in shutdown, standby, and soft-start. POK1 releases and
digital soft-start terminates when V OUT1 outputs reach the
error-comparator threshold. POK1 goes low if V OUT1 output
turns off or is 10% below its nominal regulation point. POK1
is a true open-drain output. Likewise, POK2 is used to
monitor V OUT2 .
Fault Protection
The ISL6236 provides overvoltage/undervoltage fault
protection in the buck controllers. Once activated, the
controller continuously monitors the output for undervoltage
and overvoltage fault conditions.
OUT-OF-BOUND CONDITION
When the output voltage is 5% above the set voltage, the
out-of-bound condition activates. LGATE turns on until
output reaches within regulation. Once the output is within
regulation, the controller will operate as normal. It is the "first
line of defense" before OVP. The output voltage ripple must
be sized low enough as to not nuisance trip the OOB
below 3% of the nominal output voltage set point.
FN6373.6
April 29, 2010
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6236IRZA | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers |
| ISL6236IRZAR5281 | 功能描述:IC MAIN PWR CTRLR QUAD 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6236IRZA-T | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers |
| ISL6236IRZA-TKR5281 | 功能描述:IC QUAD OUT POWER CONTROL 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
| ISL6236IRZA-TR5281 | 功能描述:IC MAIN PWR CTRLR QUAD 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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