参数资料
型号: ISL6244HRZ-T
厂商: Intersil
文件页数: 23/25页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 32-QFN
标准包装: 6,000
PWM 型: 电流/电压模式
输出数: 4
频率 - 最大: 4MHz
占空比: 75%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -10°C ~ 100°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 带卷 (TR)
ISL6244
traces, such that space between the components is reduced
while creating the PHASE plane, is recommended. Stray
Inductance in the switch path adds to the voltage spikes
generated during the switching interval. By keeping the
phase plane small, the magnitude of the potential spikes is
minimized. If possible, duplicate the same placement and
layout of these components for each phase. Figure 32
illustrates the connection of critical components for one
output channel of a converter.
Place the ISL6207 drivers as close as possible to the
MOSFETs they control to reduce the parasitics due to trace
length between critical driver input and output signals.
Position one high-frequency ceramic input capacitor next to
each upper MOSFET drain. Place the bulk input capacitors
as close to the upper MOSFET drains as dictated by the
component size and dimensions. Long distances between
input capacitors and MOSFETs drains results in too much
trace inductance and a reduction in capacitor performance.
In Figure 32, C IN and C OUT represent numerous physical
capacitors.
Locate the output capacitors between the inductors and the
load, while keeping them in close proximity around the
microprocessor socket. Care should be taken not to add
inductance in the circuit board traces that could cancel the
usefulness of the low inductance components.
The ISL6244 can be placed off to one side or centered
relative to the individual phase switching components.
Routing of sense lines and PWM signals will guide final
placement. Critical small signal components to place close
to the controller include the feedback resistor R FB ,
frequency select resistor R FS , offset resistor R OFS ,
feedforward ramp adjustment resistors R ADJ1 and R ADJ2 ,
and compensation components R C and C C . Because the
remote sense traces for VSEN and VRTN may be long and
routed close to switching nodes, a 1.0 μ F ceramic
decoupling capacitor can be placed between VSEN and
RTN of the package. This value may vary depending on the
impact of the converter response.
23
Bypass capacitors, C BP , supply critical bypassing current for
the ISL6244 and ISL6207 drivers bias supplies and must be
placed next to their respective pins. Stray trace parasitics will
reduce their effectiveness, so keep the traces to these
components as short and wide as possible.
Plane Allocation and Routing
Dedicate at least one solid layer, usually a middle layer of
the PCB, for a ground plane and make all critical component
ground connections with vias to this layer. If two ground
layers can be used, it is beneficial to run all signal lines in
between these to shield them from radiative coupling. These
include the current sense lines from PHASE, PWM, VID and
Enable lines. Dedicate one additional solid layer as a power
plane and break this plane into smaller islands of common
voltage. Keep the metal runs from the PHASE terminal to the
output inductor short. The power planes should support the
input power and output power nodes. Use copper filled
areas on the top and bottom circuit layers for the phase
nodes. Use the remaining PCB layers for small signal
routing. Size the traces from the ISL6207 driver to the power
MOSFET gates and sources to carry at least 1A of
continuous current. When routing components in the
switching path, use short wide traces to reduce the
associated parasitics.
FN9106.3
December 28, 2004
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