参数资料
| 型号： | ISL6263CRZ |
| 厂商： | Intersil |
| 文件页数： | 13/19页 |
| 文件大小： | 0K |
| 描述： | IC VREG CORE 5BIT 1PHASE 32-QFN |
| 标准包装： | 60 |
| 应用： | 转换器，Intel IMVP-6 |
| 输入电压： | 5 V ~ 25 V |
| 输出数： | 1 |
| 输出电压： | 0.41 V ~ 1.29 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 管件 |
ISL6263
Adaptive shoot-through protection prevents the gate-driver
outputs from going high until the opposite gate-driver output
has fallen below approximately 1V. The UGATE turn-on
propagation delay t PDRU and LGATE turn-on propagation
delay t PDRL are found in the Electrical Specifications table.
The power for the LGATE gate-driver is sourced directly from
the PVCC pin. The power for the UGATE gate-driver is
sourced from a boot-strap capacitor connected across the
BOOT and PHASE pins. The boot capacitor is charged from
PVCC through an internal boot-strap diode each time the
low-side MOSFET turns on, pulling the PHASE pin low.
PWM
where Q GATE is the amount of gate charge required to fully
charge the gate of the upper MOSFET. The Δ V BOOT term is
defined as the allowable droop in the rail of the upper drive.
As an example, suppose an upper MOSFET has a gate
charge, Q GATE , of 25nC at 5V and also assume the droop in
the drive voltage at the end of a PWM cycle is 200mV. One
will find that a bootstrap capacitance of at least 0.125μF is
required. The next larger standard value capacitance is
0.15μF. A good quality ceramic capacitor is recommended.
Soft-Start and Soft Dynamic VID Slew Rates
The output voltage of the converter tracks V SOFT, the
voltage across the SOFT and VSS pins. Shown in Figure 1,
the SOFT pin is connected to the output of the VID DAC
LGATE
UGATE
t PDRU
t PDRL
1V
1V
through the unidirectional soft-start current source I SS or the
bidirectional soft-dynamic VID current source I DVID , and the
non-inverting input of the error amplifier. Current is sourced
from the SOFT pin when I SS is active. The SOFT pin can
both source and sink current when I DVID is active. The
soft-start capacitor C SOFT changes voltage at a rate
proportional to I SS or I DVID . The ISL6263 automatically
selects I SS for the soft-start sequence so that the inrush
current through the output capacitors is maintained below
the OCP threshold. Once soft-start has completed, I DVID is
automatically selected for output voltage changes
FIGURE 6. GATE DRIVER TIMING DIAGRAM
Internal Bootstrap Diode
The ISL6263 has an integrated boot-strap Schottky diode
connected from the PVCC pin to the BOOT pin. Simply
adding an external capacitor across the BOOT and PHASE
pins completes the bootstrap circuit.
2.0
1.8
1.6
commanded by the VID inputs, charging C SOFT when the
output voltage is commanded to rise, and discharging
C SOFT when the output voltage is commanded to fall.
The IMVP-6+ Render Voltage Regulator specification
requires a minimum of 10mV/μs for SLEWRATE GFX . The
value for C SOFT must guarantee the minimum slew-rate of
10mV/μs when the soft-dynamic VID current source I DVID is
the minimum specified value in the Electrical Specifications
table. The value of C SOFT , can be calculated from
Equation 3:
C SOFT = ------------------------- = ------------------ = 0.0175 μ F
? ---------------- ?
1.4
1.2
1.0
I DVIDmin 175 μ A
? μ s ?
10mV 10K
(EQ. 3)
0.8
Choosing the next lower standard component value of
0.6
0.4
0.2
20nC
Q GATE = 100nC
0.015μF will guarantee 10mV/μs SLEWRATE GFX . This
choice of C SOFT controls the startup slew-rate as well. One
should expect the output voltage during soft-start to slew to
the voltage commanded by the VID settings at a nominal
0.0
0.0
0.1
0.2
0.3
0.4 0.5 0.6
0.7
0.8
0.9
1.0
rate given by Equation 4:
dV SOFT I SS 41 μ A 2.8mV
0.015 μ F
μ s
----------------------- = ------------------- = ----------------------- ≈ ------------------
C SOFT
Δ V BOOT_CAP (V)
FIGURE 7. BOOTSTRAP CAPACITANCE vs BOOT RIPPLE
VOLTAGE
dt
(EQ. 4)
The minimum value of the bootstrap capacitor can be
calculated from Equation 2:
Note that the slewrate is the average rate of change
between the initial and final voltage values. The slewrate is
C BOOT ≥ ------------------------
Q GATE
Δ V BOOT
13
(EQ. 2)
moderated as V CCGFX approaches the voltage commanded
by the VID inputs.
FN9213.2
June 10, 2010
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相关代理商/技术参数 |
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| ISL6263CRZ-T | 功能描述:直流/直流开关调节器 1 PHS INT DC/DC BUCK CNTRLR FOR INTEL RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| ISL6263DEVAL1Z | 功能描述:EVAL BAORD 1 FOR ISL6263D RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6263DHRZ | 功能描述:IC VREG 3BIT 1PHASE 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6263DHRZ-T | 功能描述:IC VREG 3BIT 1PHASE 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6263EVAL1 | 制造商:Intersil Corporation 功能描述:ISL6263 EVALUATION BOARD 1 - IMVP LICENSE REQUIRED - Bulk |
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