参数资料
| 型号： | ISL6265AHRTZ-T |
| 厂商： | Intersil |
| 文件页数： | 15/23页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR MULTI-OUTPUT 48-TQFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，AMD SVI 兼容移动式 CPU |
| 输入电压： | 5 V ~ 24 V |
| 输出数： | 3 |
| 输出电压： | 0.5 V ~ 1.55 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
ISL6265A
(See Table 3)
SVID
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
SVC
SVD
SLAVE ADDRESS PHASE
DATA PHASE
FIGURE 8. SEND BYTE EXAMPLE
SVI Bus Protocol
The AMD processor bus protocol is compliant with SMBus
send byte protocol for VID transactions (see Figure 8). During a
send byte transaction, the processor sends the start sequence
followed by the slave address of the VR for which the VID
command applies. The address byte must be configured
according to Table 4. The processor then sends the write bit.
After the write bit, if the ISL6265A receives a valid address
byte, it sends the acknowledge bit. The processor then sends
the PSI-L bit and VID bits during the data phase. The Serial VID
8-bit data field encoding is outlined in Table 5. If ISL6265A
receives a valid 8-bit code during the data phase, it sends the
acknowledge bit. Finally, the processor sends the stop
sequence. After the ISL6265A has detected the stop, it can
then proceed with the VID-on-the-fly transition.
TABLE 4. SVI SEND BYTE ADDRESS DESCRIPTION
implement dynamic VID changes, and shutdown individual
outputs.
The ISL6265A controls the no-load output voltage of core and
Northbridge output to an accuracy of ±0.5% over-the-range of
0.75V to 1.5V. A fully differential amplifier implements core
voltage sensing for precise voltage control at the
microprocessor die.
Switching Frequency
The R 3 modulator scheme is a variable frequency PWM
architecture. The switching frequency increases during the
application of a load to improve transient performance. It
also varies slightly due to changes in input and output
voltage and output current. This variation is normally less
than 10% in continuous conduction mode.
CORE FREQUENCY SELECTION
BITS
6:4 Always 110b
DESCRIPTION
A resistor connected between the VW and COMP pins of the
Core segment of the ISL6265A adjusts the switching window
3
2
1
Reserved by AMD for future use
VDD1, if set then the following data byte contains the VID for
VDD1
VDD0, if set then the following data byte contains the VID for
and therefore adjusts the switching frequency. The R FSET
resistor that sets up the switching frequency of the converter
operating in CCM can be determined using Equation 3,
where R FSET is in k Ω and the switching period is in ms.
Designs for 300kHz switching frequency would result in a
0
VID0
VDDNB, if set then the following data byte contains the VID
R FSET value of 6.81k Ω .
R FSET ( k Ω ) = ( Period ( μ s ) – 0.4 ) × 2.33
(EQ. 3)
for VIDNB
In discontinuous conduction mode (DCM), the ISL6265A
runs in period stretching mode.
TABLE 5. SERIAL VID 8-BIT DATA FIELD ENCODING
NORTHBRIDGE FREQUENCY SELECTION
(EQ. 4)
F SW = -----------------------------------
BITS
7
6:0
DESCRIPTION
PSI_L:
= 0 means the processor is at an optimal load for the
regulator(s) to enter power-savings mode
= 1 means the processor is not at an optimal load for the
regulator(s) to enter power-saving mode
SVID[6:0] as defined in Table 3.
The Northbridge switching frequency to programmed by a
resistor connected from the FSET_NB pin to the GND pin.
The approximate PWM switching frequency is written as
shown in Equation 4:
1
K ? R FSETNB
Operation
Estimating the value of R FSET_NB is written as shown in
Equation 5:
R FSET = ---------------------
After the start-up sequence, the ISL6265A begins regulating
the core and Northbridge output voltages to the pre-PWROK
1
K ? F SW
(EQ. 5)
metal VID programmed. The controller monitors SVI
commands to determine when to enter power-savings mode,
15
Where F SW is the PWM switching frequency, R FSET_NB is
the programming resistor and K = 1.5 x 10 -10 .
FN6884.0
May 11, 2009
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6265C | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multi-Output Controller with Integrated MOSFET Drivers for AMD SVI Capable Mobile CPUs |
| ISL6265C_10 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multi-Output Controller with Integrated MOSFET Drivers for AMD SVI Capable Mobile CPUs |
| ISL6265CEVAL1Z | 制造商:Intersil Corporation 功能描述:ISL6265 EVALUATION BOARD 1 - 48 LD TQFN - ROHS COMPLIANT - Bulk |
| ISL6265CHRTZ | 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLRS PHS W/EMBEDDED GATE RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6265CHRTZ-T | 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLRS PHS W/EMBEDDED GATE RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
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