参数资料
| 型号： | ISL6265AHRTZ-T |
| 厂商： | Intersil |
| 文件页数： | 6/23页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR MULTI-OUTPUT 48-TQFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，AMD SVI 兼容移动式 CPU |
| 输入电压： | 5 V ~ 24 V |
| 输出数： | 3 |
| 输出电压： | 0.5 V ~ 1.55 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
ISL6265A
Absolute Maximum Ratings
Thermal Information
Supply Voltage, VCC, PVCC . . . . . . . . . . . . . . . . . . . . . . . -0.3 - +7V
Thermal Resistance (Typical, Notes 1, 2) θ JA (°C/W)
θ JC (°C/W)
Battery Voltage, VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +28V
Boot Voltage (BOOT) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V
Boot to Phase Voltage (BOOT-PHASE). . . . . . . . -0.3V to +7V(DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +9V (<10ns)
Phase Voltage (PHASE) . . . . . . . . . -7V (<20ns Pulse Width, 10μJ)
UGATE Voltage (UGATE) . . . . . . . . . PHASE -0.3V (DC) to BOOT
LGATE Voltage (LGATE) . . . . . . . . . . . . . -0.3V (DC) to VCC + 0.3V
ALL Other Pins. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V)
Open Drain Outputs, PGOOD . . . . . . . . . . . . . . . . . . . . . -0.3 - +7V
48 Ld TQFN . . . . . . . . . . . . . . . . . . . . 32 3.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
Recommended Operating Conditions
Supply Voltage, VCC, PVCC . . . . . . . . . . . . . . . . . . . . . . . .+5V ±5%
Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V to 24V
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . .-10°C to +100°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .-10°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
2. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
VCC = PVCC = 5V, V IN = 12V, T A = -10°C to +100°C, Unless Otherwise Specified. Parameters with MIN and/or
MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
INPUT POWER SUPPLY
+5V Supply Current
POR (Power-On Reset) Threshold
Battery Supply Current (VIN)
I VCC
VCC POR r
VCC POR f
I VIN
EN = 3.3V
EN = 0V
VCC Rising
VCC Falling
EN = 0V, VIN = 24V
-
-
-
3.9
-
7.8
-
4.35
4.1
-
10
1
4.5
-
1
mA
μA
V
V
μA
SYSTEM AND REFERENCES
System Accuracy
%Error
No load, closed loop, active mode
-0.5
-
0.5
%
(V core0, V core1, V core_NB )
(V CORE )
VID = 0.75V to 1.55V
VID = 0.50V to 0.7375V
-5
-
+5
mV
RBIAS Voltage
Maximum Output Voltage
R RBIAS
V COREx
R RBIAS = 117k Ω
SVID = [000_0000b]
1.15
-
1.17
1.55
1.19
-
V
V
(max)
Minimum Output Voltage
V COREx
SVID = [101_0100b]
-
0.500
-
V
(min)
CHANNEL FREQUENCY
Nominal CORE Switching Frequency
Nominal NB Switching Frequency
f SW_core0
f SW_core_NB
VIN = 15.5V, V DAC = 1.55V, V FB0 = 1.60V,
force V comp_0 = 2V, R VW = 6.81k Ω , 2-Phase Operation
R FSET_NB = 22.1k Ω , C FSET_NB = 1nF, V DAC = 0.5V,
285
285
300
300
315
315
kHz
kHz
V sen_nb = 0.51V
Core Frequency Adjustment Range
NB Frequency Adjustment Range
200
200
-
-
500
500
kHz
kHz
AMPLIFIERS
Error Amp DC Gain (Note 3)
A V0
-
90
-
dB
Error Amp Gain-Bandwidth Product
GBW
C L = 20pF
-
18
-
MHz
(Note 3)
Error Amp Slew Rate (Note 3)
SR
C L = 20pF
-
5.0
-
V/μs
6
FN6884.0
May 11, 2009
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