参数资料
型号: ISL62771IRTZ
厂商: Intersil
文件页数: 21/36页
文件大小: 0K
描述: IC PWM CTRLR MULTIPHASE 40TQFN
标准包装: 60
系列: Robust Ripple Regulator™ (R³)
应用: 控制器,AMD Fusion? SVI 2.0 CPU GPU
输入电压: 4.5 V ~ 25 V
输出数: 2
输出电压: 0.006 V ~ 1.55 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(5x5)
包装: 管件
ISL62771
If ENABLE goes low during normal operation, all external
MOSFETs are tri-stated and both PGOOD and PGOOD_NB are
pulled low. This event clears the pre-PWROK metal VID code and
forces the controller to check SVC and SVD upon restart, storing
the pre-PWROK metal VID code found on restart.
A POR event on VCC during normal operation shuts down both
regulators, and both PGOOD outputs are pulled low. The
pre-PWROK metal VID code is not retained. Loss of VIN during
operation will typically cause the controller to enter a fault
condition on one or both outputs. The controller will shut down
both Core and Northbridge VRs and latch off. The pre-PWROK
metal VID code is not retained during the process of cycling
ENABLE to reset the fault latch and restart the controller.
VID-on-the-Fly Transition
Once PWROK is high, the ISL62771 detects this flag and begins
monitoring the SVC and SVD pins for SVI instructions. The
microprocessor follows the protocol outlined in the following
sections to send instructions for VID-on-the-fly transitions. The
ISL62771 decodes the instruction and acknowledges the new
VID code. For VID codes higher than the current VID level, the
ISL62771 begins stepping the commanded VR outputs to the
new VID target at the fixed slew rate of 10mV/μs. Once the DAC
ramps to the new VID code, a VID-on-the-Fly Complete (VOTFC)
request is sent on the SVI lines.
When the VID codes are lower than the current VID level, the
ISL62771 checks the state of power state bits in the SVI
command. If power state bits are not active, the controller begins
stepping the regulator output to the new VID target. If the power
state bits are active, the controller allows the output voltage to
decay and slowly steps the DAC down with the natural decay of
the output. This allows the controller to quickly recover and move
to a high VID code if commanded. The controller issues a VOTFC
request on the SVI lines once the SVI command is decoded and
prior to reaching the final output voltage.
VOTFC requests do not take priority over telemetry per the AMD
SVI 2 specification.
SVI Data Communication Protocol
The SVI WIRE protocol is based on the I 2 C bus concept. Three
wires [serial clock (SVC) and serial data (SVD) and telemetry
(SVT)], carry information between the AMD processor (master)
and VR controller (slave) on the bus. The master initiates and
terminates SVI transactions and drives the clock, SVC, during a
transaction. The AMD processor is always the master, and the
voltage regulators are the slaves. The slave receives the SVI
transactions and acts accordingly. Mobile SVI WIRE protocol
timing is based on high-speed mode I 2 C. See AMD publication
#48022 for additional details.
21
FN8321.2
September 12, 2013
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ISL62771IRTZ-T 功能描述:IC PWM CTRLR MULTIPHASE 40TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:Robust Ripple Regulator™ (R³) 标准包装:43 系列:- 应用:控制器,Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN(7x7) 包装:管件
ISL62773 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiphase PWM Regulator for AMD Fusiona?¢ Desktop CPUs Using SVI 2.0
ISL62773HRZ 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLR FOR AMD FUSION UP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14
ISL62773HRZ-T 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLR FOR AMD FUSION UP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14
ISL62773IRZ 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLR FOR AMD FUSION UP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14