参数资料
| 型号： | ISL6312AIRZ |
| 厂商： | Intersil |
| 文件页数： | 30/35页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM 4PHASE BUCK 48-QFN |
| 标准包装： | 43 |
| 应用： | 控制器，Intel VR10、VR11、AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.38 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
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ISL6312A
-------------------------------- > f 0
R C = R FB ? --------------------------------------------------------
0.66 ? V
0.66 ? V IN
2 ? π ? V PP ? R FB ? f 0
-------------------------------- ≤ f 0 < -------------------------------------
Case 1:
Case 2:
1
2 ? π ? L ? C
2 ? π ? f 0 ? V pp ? L ? C
IN
C C = ----------------------------------------------------
1 1
2 ? π ? L ? C 2 ? π ? C ? ESR
In high-speed converters, the output capacitor bank is usually
the most costly (and often the largest) part of the circuit.
Output filter design begins with minimizing the cost of this part
of the circuit. The critical load parameters in choosing the
output capacitors are the maximum size of the load step, Δ I,
the load-current slew rate, di/dt, and the maximum allowable
output-voltage deviation under transient loading, Δ V MAX .
Capacitors are characterized according to their capacitance,
ESR, and ESL (equivalent series inductance).
At the beginning of the load transient, the output capacitors
supply all of the transient current. The output voltage will
V PP ? ( 2 ? π ) 2 ? f 02 ? L ? C
0.66 ? V IN
C C = -------------------------------------------------------------------------------------
PP ? R FB ?
( 2 ? π ) 2 ? f 2 ? V L ? C
0.66 ? V
R C = R FB ? -----------------------------------------------------------------
IN
0
(EQ. 44)
initially deviate by an amount approximated by the voltage
drop across the ESL. As the load current increases, the
voltage drop across the ESR increases linearly until the load
current reaches its final value. The capacitors selected must
have sufficiently low ESL and ESR so that the total output-
voltage deviation is less than the allowable maximum.
f 0 > -------------------------------------
Case 3:
1
2 ? π ? C ? ESR
Neglecting the contribution of inductor current and regulator
response, the output voltage initially deviates by an amount:
R C = R FB ? ---------------------------------------------
Δ V ≈ ESL ? ----- + ESR ? Δ I
2 ? π ? f 0 ? V pp ? L
0.66 ? V IN ? ESR
di
dt
(EQ. 45)
2 ? π ? V PP ? R FB ? f 0 ? L
0.66 ? V IN ? ESR ? C
C C = ----------------------------------------------------------------
In Equation 44, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent series resistance of
the bulk output filter capacitance; and V PP is the
peak-to-peak sawtooth signal amplitude as described in the
Once selected, the compensation values in Equation 44
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R C . Slowly increase the
value of R C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C C will not need adjustment. Keep the value of C C from
Equation 44 unless some performance issue is noted.
The optional capacitor C 2 , is sometimes needed to bypass
noise away from the PWM comparator (see Figure 20). Keep
The filter capacitor must have sufficiently low ESL and ESR
so that Δ V < Δ V MAX .
Most capacitor solutions rely on a mixture of high frequency
capacitors with relatively low capacitance in combination
with bulk capacitors having high capacitance but limited
high-frequency performance. Minimizing the ESL of the
high-frequency capacitors allows them to support the output
voltage as the current increases. Minimizing the ESR of the
bulk capacitors allows them to supply the increased current
with less output voltage deviation.
The ESR of the bulk capacitors also creates the majority of
the output-voltage ripple. As the bulk capacitors sink and
source the inductor AC ripple current (see “Interleaving” on
capacitor ESR equal to I C,PP (ESR). Thus, once the output
capacitors are selected, the maximum allowable ripple
voltage, V PP(MAX) , determines the lower limit on the
inductance.
– N ? V OUT ? ? V OUT
? V
L ≥ ESR ? --------------------------------------------------------------------
a position available for C 2 , and be prepared to install a
high frequency capacitor of between 22pF and 150pF in
case any leading edge jitter problem is noted.
? IN ?
f S ? V IN ? V PP ( MAX )
(EQ. 46)
Output Filter Design
The output inductors and the output capacitor bank together
to form a low-pass filter responsible for smoothing the
pulsating voltage at the phase nodes. The output filter also
must provide the transient energy until the regulator can
respond. Because it has a low bandwidth compared to the
switching frequency, the output filter limits the system
transient response. The output capacitors must supply or
sink load current while the current in the output inductors
increases or decreases to meet the demand.
30
Since the capacitors are supplying a decreasing portion of
the load current while the regulator recovers from the
transient, the capacitor voltage becomes slightly depleted.
The output inductors must be capable of assuming the entire
load current before the output voltage decreases more than
Δ V MAX . This places an upper limit on inductance.
Equation 47 gives the upper limit on L for the cases when
the trailing edge of the current transient causes a greater
output-voltage deviation than the leading edge. Equation 48
FN9290.5
February 1, 2011
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相关代理商/技术参数 |
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| ISL6312AIRZ-T | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6312CRZ | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
| ISL6312CRZ-T | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6312CRZ-TK | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6312CRZ-TR5312 | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
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