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参数资料
| 型号： | ISL6316CRZ |
| 厂商： | Intersil |
| 文件页数： | 24/29页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 40-QFN |
| 标准包装： | 50 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 275kHz |
| 占空比： | 66.7% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页当前第24页第25页第26页第27页第28页第29页
ISL6316
A third component involves the lower MOSFET’s reverse-
recovery charge, Q rr . Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Q rr , it is conducted
through the upper MOSFET across VIN. The power
dissipated as a result is P UP,3 and is approximately:
Load-Line Regulation Resistor
The load-line regulation resistor is labeled R FB in Figure 8. Its
value depends on the desired full-load droop voltage
(V DROOP in Figure 8). If Equation 28 is used to select each
ISEN resistor, the load-line regulation resistor is as shown in
Equation 30.
P UP , 3 = V IN Q rr f S
(EQ. 26)
Finally, the resistive part of the upper MOSFET’s is given in
– 6
V DROOP
R FB = -------------------------
70 × 10
(EQ. 30)
∑ R ISEN ( n )
I FL r DS ( ON )
Equation 27 as P UP,4 .
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 24, 25, and 26. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process involving repetitive
solutions to the loss equations for different MOSFETs and
If one or more of the ISEN resistors is adjusted for thermal
balance, as in Equation 29, the load-line regulation resistor
should be selected according to Equation 31 where I FL is the
full-load operating current and R ISEN(n) is the ISEN resistor
connected to the n th ISEN pin.
V DROOP
R FB = ------------------------------- (EQ. 31)
n
different switching frequencies.
Compensation
? I M ?
I P-P
P UP , 4 ≈ r DS ( ON ) ? ------ ? d + ----------- d
? N ? 12
2 2
(EQ. 27)
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
Current Sensing Resistor
The resistors connected between these pins and the
respective phase nodes determine the gains in the load-line
regulation loop and the channel-current balance loop as well
as setting the overcurrent trip point. Select values for these
resistors based on the room temperature r DS(ON) of the lower
MOSFETs, DCR of inductor or additional resistor; the full-load
operating current, I FL ; and the number of phases, N using
Equation 28.
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar manner
to a peak-current mode controller because the two poles at
the output-filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final locations of these poles are determined by the system
function, the gain of the current signal, and the value of the
70 × 10 – 6 N
R X I FL
R ISEN = ----------------------- --------
(EQ. 28)
compensation components, R C and C C .
Since the system poles and zero are affected by the values of
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistor. When the components of
one or more channels are inhibited from effectively dissipating
their heat so that the affected channels run hotter than
desired, choose new, smaller values of RISEN for the affected
phases (see the section entitled Channel-Current Balance ).
Choose R ISEN,2 in proportion to the desired decrease in
temperature rise in order to cause proportionally less current
to flow in the hotter phase.
the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
R ISEN , 2 = R ISEN ---------- 2
Δ T
Δ T 1
(EQ. 29)
In Equation 29, make sure that Δ T 2 is the desired temperature
rise above the ambient temperature, and Δ T 1 is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 29 is usually
sufficient, it may occasionally be necessary to adjust R ISEN
two or more times to achieve optimal thermal balance
between all channels.
24
FN9227.1
December 12, 2006
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