参数资料
| 型号： | ISL6322GIRZ-T |
| 厂商： | Intersil |
| 文件页数： | 20/39页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 48-QFN |
| 标准包装： | 4,000 |
| 应用： | 控制器，Intel VR10、VR11、AMD CPU |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.38 V ~ 1.99 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页当前第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页
ISL6322G
INTEL DYNAMIC VID TRANSITIONS
FB
When in Intel VR10 or VR11 mode, the ISL6322G checks
-
V OFS
+
R FB
I OFS
E/A
the VID inputs on the positive edge of an internal 3MHz
clock. If a new code is established and it remains stable for 3
VDIFF
1:1
CURRENT
MIRROR
REF
consecutive readings (1μs to 1.33μs), the ISL6322G
recognizes the new code and changes the internal DAC
reference directly to the new level. The Intel processor
controls the VID transitions and is responsible for
VCC
I OFS
-
incrementing or decrementing one VID step at a time. In
VR10 and VR11 settings, the ISL6322G will immediately
change the internal DAC reference to the new requested
value as soon as the request is validated, which means the
fastest recommended rate at which a bit change can occur is
once every 2μs. In cases where the reference step is too
R OFS
OFS
1.6V
+
large, the sudden change can trigger overcurrent or
overvoltage events.
ISL6322G
VCC
FIGURE 7. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
Dynamic VID
Modern microprocessors need to make changes to their core
voltage as part of normal operation. They direct the ISL6322G
to do this by making changes to the VID inputs. The
ISL6322G is required to monitor the DAC inputs and respond
to on-the-fly VID changes in a controlled manner, supervising
In order to ensure the smooth transition of output voltage
during a VR10 or VR11 VID change, a VID step change
smoothing network is required. This network is composed of
an internal 1k Ω resistor between the DAC and the REF pin,
and the external capacitor C REF , between the REF pin and
ground. The selection of C REF is based on the time duration
for 1-bit VID change and the allowable delay time.
Assuming the microprocessor controls the VID change at
1-bit every T VID , the relationship between C REF and T VID is
given by Equation 11.
a safe output voltage transition without discontinuity or
disruption. The DAC mode the ISL6322G is operating in
C REF = 0.001 ( S ) ? T VID
(EQ. 11)
determines how the controller responds to a dynamic VID
change.
FB
As an example, for a VID step change rate of 5μs per bit, the
value of C REF is 5600pF based on Equation 11.
AMD DYNAMIC VID TRANSITIONS
When running in AMD 5-bit or 6-bit modes of operation, the
+
V OFS
-
R FB
I OFS
E/A
ISL6322G responds differently to a dynamic VID change than
when in Intel VR10 or VR11 mode. In the AMD modes, the
ISL6322G still checks the VID inputs on the positive edge of
VDIFF
VCC
REF
an internal 3MHz clock. In these modes the VID code can be
changed by more than a 1-bit step at a time. If a new code is
established and it remains stable for 3 consecutive readings
1:1
CURRENT
MIRROR
I OFS
(1μs to 1.33μs), the ISL6322G recognizes the change and
begins slewing the DAC in 6.25mV steps at a stepping
frequency of 330kHz until the VID and DAC are equal. Thus,
the total time required for a VID change, t DVID , is dependent
only on the size of the VID change ( Δ V VID ).
OFS
+
0.4V
-
The time required for a ISL6322G-based converter in AMD
5-bit DAC configuration to make a 1.1V to 1.5V reference
voltage change is about 194μs, as calculated using
R OFS
ISL6322G
Equation 12.
t DVID = -------------------------- ? ? --------------------- ?
3 ? 0.00625 ?
GND
FIGURE 8. NEGATIVE OFFSET OUTPUT VOLTAGE
GND
330 × 10
1 Δ V VID
(EQ. 12)
PROGRAMMING
20
In order to ensure the smooth transition of output voltage
during an AMD VID change, a VID step change smoothing
network is required. This network is composed of an internal
FN6715.0
May 22, 2008
相关PDF资料 |
PDF描述 |
|---|---|
| ISL6322IRZ | IC CTRLR PWM 4PHASE BUCK 48-QFN |
| ISL6323AIRZ | IC PWM CTRLR SYNC BUCK DL 48QFN |
| ISL6323BIRZ | IC PWM CTRLR SYNC BUCK DL 48QFN |
| ISL6323IRZ | IC HYBRID CTRLR PWM MONO 48-QFN |
| ISL6324AIRZ | IC HYBRID CTRLR PWM DUAL 48QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6322IRZ | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6322IRZ-T | 功能描述:IC CTRLR PWM 4PHASE BUCK 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6323ACRZ | 功能描述:IC PWM CTRLR SYNC BUCK DL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6323ACRZR5381 | 制造商:Intersil Corporation 功能描述:4+1 PHASE CONT. FOR CORE+NORTHBRIDGE,1 PHASE PSI, 3.4MHZ SVI - Rail/Tube 制造商:Intersil Corporation 功能描述:IC PWM CTRLR SYNC BUCK DL 48QFN |
| ISL6323ACRZ-T | 功能描述:IC PWM CTRLR SYNC BUCK DL 48QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
发布紧急采购，3分钟左右您将得到回复。