参数资料
型号: ISL6333IRZ
厂商: Intersil
文件页数: 34/40页
文件大小: 0K
描述: IC CTRLR PWM 3PHASE BUCK 48-QFN
标准包装: 43
应用: 控制器,Intel VR11
输入电压: 5 V ~ 12 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(7x7)
包装: 管件
ISL6333, ISL6333A, ISL6333B, ISL6333C
.
also be placed across the R APA resistor to help with noise
immunity. Use Equation 39 to set R APA to get the desired
APA trip level. An APA trip level of 500mV is recommended
R APA = --------------------------------- = ----------------------------- = 5k Ω
Δ V 1
Δ V 2
V OUT
for most applications.
V APA ( TRIP ) 500mV
100 × 10 – 6 100 × 10 – 6
Compensation
(EQ. 39)
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
I TRAN
Δ I
FIGURE 23. TIME CONSTANT MISMATCH BEHAVIOR
Loadline Regulation Resistor
If load line regulation is desired on the ISL6333 and
ISL6333A, the IDROOP pin should be connected to the FB
pin in order for the internal average sense current to flow
out across the loadline regulation resistor, labeled R FB in
Figure 7. The ISL6333B and ISL6333C always have the
load line regulation enabled. The R FB resistor value sets
the desired loadline required for the application. The
desired loadline, R LL , can be calculated by Equation 36
where V DROOP is the desired droop voltage at the full load
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATION WITH LOAD-LINE REGULATION
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R C and C C . See Figure 24.
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
I FL
current I FL .
V DROOP
R LL = -------------------------
(EQ. 36)
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
Based on the desired loadline, the loadline regulation
resistor, R FB , can be calculated from Equation 37.
transient performance.
C 2 (OPTIONAL)
R LL ? N ? R SET 3
DCR ----------
R FB = --------------------------------------- ? 400
(EQ. 37)
R C
C C
COMP
In Equation 37, R LL is the loadline resistance; N is the
number of active channels; DCR is the DCR of the individual
output inductors; and R SET is the RSET pin resistor.
FB
If no loadline regulation is required on the ISL6333 and
ISL6333A, the IDROOP pin should be left unconnected. To
choose the value for R FB in this situation, please refer to
“Compensation Without Load-line Regulation” on page 35.
R FB
IDROOP
VDIFF
ISL6333
R IMON = -------------------------------- ? ---------------
DCR ? I OCP
IMON Pin Resistor
A copy of the average sense current flows out of the IMON
pin, and a resistor, R IMON , placed from this pin to ground can
be used to set the overcurrent protection trip level. Based on
the desired overcurrent trip threshold, I OCP , the IMON pin
resistor, R IMON , can be calculated from Equation 38.
R SET ? N 3.381
(EQ. 38)
400
APA Pin Component Selection
A 100μA current flows into the APA pin and across R APA to
set the APA trip level. A 1000pF capacitor, C APA , should
34
FIGURE 24. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6333 CIRCUIT
Select a target bandwidth for the compensated system, f 0 .
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f 0
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
FN6520.3
October 8, 2010
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ISL6334ACRZR5368 功能描述:IC CTRLR PWM 4PHASE BUCK 40QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器,Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN(7x7) 包装:管件
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