参数资料
型号: ISL6334ACRZ-TR5368
厂商: Intersil
文件页数: 16/31页
文件大小: 0K
描述: IC CTRLR PWM 4PHASE BUCK 40QFN
标准包装: 4,000
应用: 控制器,Intel VR11.1
输入电压: 3 V ~ 12 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: 40-QFN(6x6)
包装: 带卷 (TR)
ISL6334AR5368
Channel current balance is essential in achieving the
thermal advantage of multiphase operation. With good
current balance, the power loss is equally dissipated over
multiple devices and a greater area.
Voltage Regulation
The compensation network shown in Figure 6 assures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6334AR5368 to include the combined tolerances of
each of these elements.
The sensed average current I AVG is tied to FB internally. This
current will develop voltage drop across the resistor between
FB and VDIFF pins for droop control. ISL6334AR5368 can not
output, V DIFF , is connected to the inverting input of the error
amplifier through an external resistor.
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the eight 6-bit logic signal
(VID) into one of the discrete voltages shown in Table 2. All
VID pins have no internal pull-up current sources after t D3 .
After t D3 , each VID input offers a minimum 30μA pull-up to
an internal 2.5V source for use with open-drain outputs. The
pull-up current diminishes to zero above the logic threshold
to protect voltage-sensitive output devices. External pull-up
resistors can augment the pull-up current sources in case
leakage into the driving device is greater than 30μA.
TABLE 2. VR11 VID 8 BIT
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE
be used for non-droop applications.
The output of the error amplifier, V COMP , is compared to
sawtooth waveforms to generate the PWM signals. The
PWM signals control the timing of the Intersil MOSFET
drivers and regulate the converter output to the specified
reference voltage. The internal and external circuitry, which
control voltage regulation, are illustrated in Figure 6.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
OFF
OFF
1.60000
1.59375
1.58750
1.58125
EXTERNAL CIRCUIT
ISL6334AR5368
0
0
0
0
0
1
1
0
1.57500
R C
C C
COMP
INTERNAL CIRCUIT
0
0
0
0
0
1
1
1
1.56875
DAC
0
0
0
0
1
0
0
0
1.56250
R REF
C REF
REF
+
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
0
1
1.55625
1.55000
1.54375
V COMP
R FB
+
V DROOP
-
FB
VDIFF
I AVG
-
ERROR AMPLIFIER
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
0
1
0
1.53750
1.53125
1.52500
0
0
0
0
1
1
1
1
1.51875
V OUT +
VSEN
+
0
0
0
1
0
0
0
0
1.51250
0
0
0
1
0
0
0
1
1.50625
V OUT -
RGND
-
0
0
0
1
0
0
1
0
1.50000
DIFFERENTIAL
REMOTE-SENSE
0
0
0
1
0
0
1
1
1.49375
AMPLIFIER
0
0
0
1
0
1
0
0
1.48750
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6334AR5368 incorporates an internal differential
remote-sense amplifier in the feedback path. The amplifier
removes the voltage error encountered when measuring the
output voltage relative to the local controller ground
reference point, resulting in a more accurate means of
sensing output voltage. Connect the microprocessor sense
pins to the non-inverting input, VSEN, and inverting input,
RGND, of the remote-sense amplifier. The remote-sense
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1.48125
1.47500
1.46875
1.46250
1.45625
1.45000
1.44375
1.43750
16
FN6839.2
September 7, 2010
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