参数资料
型号: ISL6334ACRZ-TR5368
厂商: Intersil
文件页数: 27/31页
文件大小: 0K
描述: IC CTRLR PWM 4PHASE BUCK 40QFN
标准包装: 4,000
应用: 控制器,Intel VR11.1
输入电压: 3 V ~ 12 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: 40-QFN(6x6)
包装: 带卷 (TR)
ISL6334AR5368
------------------- > f 0
R C = R FB --------------------------------------
0.75V
2 π V PP R FB f 0
------------------- ≤ f 0 < ------------------------------
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
Case 1:
Case 2:
1
2 π LC
2 π f 0 V P-P LC
IN
0.75V IN
C C = ------------------------------------
1 1
2 π LC 2 π C ( ESR )
R C = R FB ----------------------------------------------
0.75 V
C C = --------------------------------------------------------------
P-P R FB LC
( 2 π ) 2 f 2 V
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R C and C C .
V P-P ( 2 π ) 2 f 02 LC
IN
0.75V IN
0
(EQ. 35)
f 0 > ------------------------------
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
Case 3:
1
2 π C ( ESR )
0.75 V IN ( ESR )
2 π V P-P R FB f 0 L
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
C 2 (OPTIONAL)
2 π f 0 V P-P L
R C = R FB ------------------------------------------
0.75V IN ( ESR ) C
C C = -------------------------------------------------
In Equation 35, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V PP is the sawtooth
amplitude described in the “Electrical Specifications” table
R C
C C
COMP
beginning on page 8.
The optional capacitor C 2 , is sometimes needed to bypass
+
FB
noise away from the PWM comparator. Keep a position
available for C 2 , and be prepared to install a high-frequency
capacitor of between 10pF and 100pF in case any
R FB
V DROOP
leading-edge jitter problem is noted.
-
VDIFF
Once selected, the compensation values in Equation 35
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
FIGURE 17. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6334AR5368
CIRCUIT
The feedback resistor, R FB , has already been chosen as
outlined in “Load-Line Regulation Resistor” on page 26.
Select a target bandwidth for the compensated system, f 0 .
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f 0
to the L-C pole frequency and the ESR zero frequency. For
each of the three cases which follow, there is a separate set
of equations for the compensation components.
27
improved by making adjustments to R C . Slowly increase the
value of R C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C C will not need adjustment. Keep the value of C C from
Equation 35 unless some performance issue is noted.
Output Filter Design
The output inductors and the output capacitor bank together
to form a low-pass filter responsible for smoothing the
pulsating voltage at the phase nodes. The output filter also
must provide the transient energy until the regulator can
respond. Because it has a low bandwidth compared to the
switching frequency, the output filter necessarily limits the
system transient response. The output capacitor must
supply or sink load current while the current in the output
inductors increases or decreases to meet the demand.
FN6839.2
September 7, 2010
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