参数资料
型号: ISL6336AIRZ
厂商: Intersil
文件页数: 22/31页
文件大小: 0K
描述: IC CTRLR PWM 6PHASE BUCK 48-QFN
标准包装: 43
应用: 控制器,Intel VR11.1
输入电压: 3 V ~ 12 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(7x7)
包装: 管件
ISL6336, ISL6336A
sensed average current and the resistor value. The ISL6336,
ISL6336A continually monitors the voltage at the IMON pin. If
the voltage at the IMON pin is higher than 1.11V, a comparator
trips and causes the converter to shutdown.
The voltage at the IMON pin may be delayed relative to the
sensed current, I AVG , due to the capacitor that is in parallel
with the IMON resistor to GND that is required in some
applications. This time constant can be >300μs. This lag can
cause the output voltage to remain high for a longer time
period before the OC comparator is tripped. This can lead to
higher duty cycles of the output voltage during overcurrent
current limit of individual channel will not trigger the
converter to shutdown.
The overcurrent protection level for the above three OCP
modes can be adjusted by changing the value of current
sensing resistors. In addition, ISL6336, ISL6336A can also
adjust the average OCP threshold level by adjusting the
value of the resistor from IMON to GND. This provides
additional safety for the voltage regulator.
Equation 19 can be used to calculate the value of the
resistor R IMON based on the desired OCP level I AVG, OCP2 .
R IOUT = -------------------------------
hiccup mode. To avoid this the external current sense
resistors should be selected so that the instantaneous
1.11V
I AVG , OCP2
(EQ. 19)
overcurrent trip occurs at about the same sense current level
as the IMON trip. For example, the IMON resistor to GND
should be selected such that the voltage at IMON reaches
1.12V when IAVG reaches ~100μA. Another option is to
remove the capacitor that is in parallel with the IMON resistor
and add the required filter to the output of a IMON buffer.
At the beginning of overcurrent shutdown, the controller places
all PWM signals in a high-impedance state within 20ns
commanding the Intersil MOSFET driver ICs to turn off both
upper and lower MOSFETs. The system remains in this state
for 4096 switching cycles (programmed switching frequency). If
the controller is still enabled at the end of this wait period, it will
attempt a soft-start. If the fault remains, the trip-retry cycles will
continue indefinitely (as shown in Figure 13) until either
controller is disabled or the fault is cleared. Note that the energy
delivered during trip-retry cycling is much less than during
full-load operation, so there is no thermal hazard during this
kind of operation.
OUTPUT CURRENT
0A
OUTPUT VOLTAGE
0V
2ms/DIV
FIGURE 13. OVERCURRENT BEHAVIOR IN HICCUP MODE,
F SW = 500kHz
For the individual channel overcurrent protection, the
ISL6336, ISL6336A continuously compares the sensed
current signal of each channel with the 129μA reference
current. If one channel current exceeds the reference
current, ISL6336, ISL6336A will pull the PWM signal of this
channel low for the rest of the switching cycle. This PWM
signal can be turned on next cycle if the sensed channel
current is less than the 129μA reference current. The peak
22
Thermal Monitoring (VR_HOT/VR_FAN)
There are two thermal signals to indicate the temperature
status of the voltage regulator: VR_HOT and VR_FAN. Both
VR_FAN and VR_HOT are open-drain outputs, and external
pull-up resistors are required. The VR_HOT/VR_FAN
signals are valid only after the controller is enabled.
VR_FAN signal indicates that the temperature of the voltage
regulator is high and more cooling airflow is needed.
VR_HOT signal can be used to inform the system that the
temperature of the voltage regulator is too high and the CPU
should reduce its power consumption. VR_HOT signal may
be tied to the CPU’s PROCHOT# signal.
The diagram of the thermal monitoring function block is shown
in Figure 14. One NTC resistor should be placed close to the
power stage of the voltage regulator to sense the operational
temperature, and one pull-up resistor is needed to form the
voltage divider for TM pin. The NTC thermistor should be
placed next to the current sense element of a phase that will
remain active when PSI# is asserted low. As the temperature of
the power stage increases, the resistance of the NTC will
reduce, resulting in the reduced voltage at the TM pin.
Figure 15 shows the TM voltage over temperature for a typical
design with a recommended 6.8k Ω NTC (P/N:
NTHS0805N02N6801 from Vishay) and 1k Ω resistor RTM1.
We recommend using these resistors for accurate temperature
compensation.
There are two comparators with hysteresis to compare the
TM pin voltage to the fixed thresholds for VR_FAN and
VR_HOT signals respectively. VR_FAN signal is set high
when the TM voltage is lower than 39.1% of VCC voltage,
and is pulled to GND when the TM voltage increases to
above 45.1% of VCC. VR_HOT is set to high when the TM
voltage goes below 33.3% of VCC, and is pulled to GND
when the TM voltage goes back to above 39.1% of VCC.
Figure 16 shows the operation of these signals.
FN6504.1
May 28, 2009
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