参数资料
| 型号： | ISL6363IRTZ |
| 厂商： | Intersil |
| 文件页数： | 24/32页 |
| 文件大小： | 0K |
| 描述： | IC CONTROLLER VR12 48TQFN |
| 标准包装： | 50 |
| 应用： | 控制器，Intel VR12 |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 输出电压： | 0.25 V ~ 1.52 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-TQFN-EP（6x6） |
| 包装： | 管件 |
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ISL6363
I O
I L
VO
R ip and C ip form an R-C branch in parallel with R i , providing a
lower impedance path than R i at the beginning of i o change. R ip
and C ip do not have any effect at steady state. Through proper
selection of R ip and C ip values, i droop can resemble i o rather than
i L , and V O will not ring back. The recommended value for R ip is
100 Ω . C ip should be determined through tuning the load
transient response waveforms on an actual board. The
RING
BACK
FIGURE 20. OUTPUT VOLTAGE RING BACK PROBLEM
ISUM+
recommended range for C ip is 100pF~2000pF. However, it
should be noted that the R ip -C ip branch may distort the i droop
waveform. Instead of being triangular as the real inductor
current, i droop may have sharp spikes, which may adversely
affect i droop average value detection and therefore may affect
OCP accuracy. User discretion is advised.
Resistor Current-Sensing Network
Rntcs
Cn.1
Phase1
Phase2
Phase3
Rp
Cn.2 Vcn
Rntc
Rn
L
L
L
OPTIONAL
Ri
ISUM-
DCR
DCR
DCR
Rsum
Rip
Cip
Rsum
Rsum
ISUM+
OPTIONAL
Rsen
Rsen
Rsen
Ro
Vcn
Cn
Ri
ISUM-
FIGURE 21. OPTIONAL CIRCUITS FOR RING BACK REDUCTION
Ro
Figure 20 shows the output voltage ring back problem during
load transient response. The load current i o has a fast step
change, but the inductor current I L cannot accurately follow.
Instead, I L responds in first order system fashion due to the
nature of current loop. The ESR and ESL effect of the output
Io
Ro
capacitors makes the output voltage V O dip quickly upon load
current change. However, the controller regulates V O according to
the droop current I droop , which is a real-time representation of I L ;
therefore it pulls V O back to the level dictated by I L , causing the
ring back problem. This phenomenon is not observed when the
output capacitor have very low ESR and ESL, such as all ceramic
capacitors.
Figure 21 shows two optional circuits for reduction of the ring
back.
FIGURE 22. RESISTOR CURRENT-SENSING NETWORK
Figure 22 shows the resistor current-sensing network for a
2-phase solution. Each inductor has a series current-sensing
resistor R sen . R sum and R o are connected to the R sen pads to
accurately capture the inductor current information. The R sum
and R o resistors are connected to capacitor C n . R sum and C n
form a filter for noise attenuation. Equations 25 thru 27 give
V Cn (s) expression
V Cn ( s ) = ------------ × I o ( s ) × A Rsen ( s )
C n is the capacitor used to match the inductor time constant. It
usually takes the parallel of two (or more) capacitors to get the
R sen
N
(EQ. 25)
A Rsen ( s ) = ----------------------
s
ω sns
ω Rsen = ---------------------------
R sum
desired value. Figure 21 shows that two capacitors C n.1 and C n.2
are in parallel. Resistor R n is an optional component to reduce
the V O ring back. At steady state, C n.1 + C n.2 provides the desired
C n capacitance. At the beginning of i o change, the effective
capacitance is less because R n increases the impedance of the
C n.1 branch. As Figure 18 explains, V O tends to dip when C n is too
small, and this effect will reduce the V O ring back. This effect is
more pronounced when C n.1 is much larger than C n.2 . It is also
more pronounced when R n is bigger. However, the presence of
R n increases the ripple of the V n signal if C n.2 is too small. It is
recommended to keep C n.2 greater than 2200pF. R n value
usually is a few ohms. C n.1 , C n.2 and R n values should be
determined through tuning the load transient response
waveforms on an actual board.
24
1
(EQ. 26)
1 + ------------
1
(EQ. 27)
N
-------------- × C n
Transfer function A Rsen (s) always has unity gain at DC.
Current-sensing resistor R sen value will not have significant
variation over-temperature, so there is no need for the NTC
network.
The recommended values are R sum = 1k Ω and C n = 5600pF.
FN6898.1
September 5, 2013
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相关代理商/技术参数 |
参数描述 |
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| ISL6363IRTZ-T | 功能描述:IC CONTROLLER VR12 48TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6364ACRZ | 功能描述:IC CNTRLR DUAL IMVP7 VR12 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6364ACRZ-T | 功能描述:IC CNTRLR DUAL IMVP7 VR12 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6364AIRZ | 功能描述:IC CNTRLR DUAL IMVP7 VR12 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6364AIRZ-T | 功能描述:IC CNTRLR DUAL IMVP7 VR12 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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