参数资料
| 型号： | ISL6540AIRZA-T |
| 厂商： | Intersil |
| 文件页数： | 11/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 28-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 2MHz |
| 占空比： | 100% |
| 电源电压： | 2.97 V ~ 22 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-VFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 产品目录页面： | 1243 (CN2011-ZH PDF) |
| 其它名称： | ISL6540AIRZA-TDKR |
ISL6540A
OV/UV/PGOOD comparators. The VMON pin should be
connected to the FB pin by a standard feedback network. In
the event of the remote sense buffer is disabled, the VMON
pin should be connected to VOUT by a resistor divider along
with FB’s compensation network. An RC filter should be
used if VMON is to be connected directly to FB instead of to
VOUT through a separate resistor divider network.
GND (Bottom Side Pad, Analog Ground)
Signal ground for the IC. All voltage levels are measured
with respect to this pin. This pin should not be left floating.
Functional Description
Initialization
The ISL6540A automatically initializes upon receipt of power
without requiring any special sequencing of the input
supplies. The Power-On Reset (POR) function continually
monitors the input supply voltages (PVCC, VFF, VCC) and
the voltage at the EN pin. Assuming the EN pin is pulled to
above ~0.50V, the POR function initiates soft-start operation
after all input supplies exceed their POR thresholds.
HIGH = ABOVE POR; LOW = BELOW POR
VCC POR
input rails greater than a 3.3V and require a specific input rail
POR and Hysteresis levels for better undervoltage
protection. Consider for a 12V application choosing
R UP = 97.6k Ω and R DOWN = 5.76k Ω there by setting the
rising threshold (V EN_RTH ) to ~10V and the falling threshold
(V EN_FTH ) to ~9V, for ~1V of hysteresis (V EN_HYS ). Care
should be taken to prevent the voltage at the EN pin from
exceeding VCC when using the programmable UVLO
functionality.
Soft-Start
The POR function activates the internal 37μA OTA which
begins charging the external capacitor (C SS ) on the SS pin to a
target voltage of VCC. The ISL6540A’s soft-start logic continues
to charge the SS pin until the voltage on COMP exceeds the
bottom of the oscillator ramp, at which point, the driver outputs
are enabled with the low side MOSFET first being held low for
200ns to provide for charging of the bootstrap capacitor. Once
the driver outputs are enabled, the OTA’s target voltage is then
changed to the margined (if margining is being used) reference
voltage (V REF_MARG ), and the SS pin is ramped up or down
accordingly. This method reduces start-up surge currents due
to a pre-charged output by inhibiting regulator switching until
the control loop enters its linear region. By ramping the positive
input of the error amplifier to VCC and then to V REF_MARG , it is
VFF POR
PVCC POR
EN POR
AND
SOFT-START
even possible to mitigate surge currents from outputs that are
pre-charged above the set output voltage. As the SS pin
connects directly to the non-inverting input of the error amplifier,
noise on this pin should be kept to a minimum through careful
FIGURE 1. SOFT-START INITIALIZATION LOGIC
VIN
R UP
routing and part placement. To prevent noise injection into the
error amplifier the SS capacitor should be located within 150
mils of the SS and GND pins. Soft-start is declared done when
the drivers have been enabled and the SS pin is within ±3mV of
R EN
1k Ω
V EN_REF
SYS_ENABLE
V REF_MARG .
VMON
+15%
R UP = -------------------------- – 1k Ω
R DOWN
V EN_HYS
I EN_HYS
EN
I EN_HYS =10μA
+9%
V REF_MARG
-9%
-15%
R DOWN = ------------------------------------------------------------------
( R UP + 1k Ω ) ? V EN_REF
V EN_FTH – V EN_REF
UV
GOOD
OV
GOOD
UV
V EN_FTH = V EN_RTH – V EN_HYS
FIGURE 2. ENABLE POR CIRCUIT
With all input supplies above their POR thresholds, driving
FIGURE 3. UNDERVOLTAGE-OVERVOLTAGE WINDOW
T PG_DLY = C PG_DLY ? ----------------
the EN pin above 0.50V initiates a soft-start cycle. In addition
to normal TTL logic, the enable pin can be used as a voltage
monitor with programmable hysteresis through the use of the
internal 10μA sink current and an external resistor divider.
This feature is especially designed for applications that have
11
1.49V
21 μ A
(EQ. 1)
FN6288.5
October 7, 2008
相关PDF资料 |
PDF描述 |
|---|---|
| ISL65426HRZ | IC REG BUCK SYNC ADJ 6A DL 50QFN |
| ISL6545IBZ-T | IC REG CTRLR BUCK PWM VM 8-SOIC |
| ISL6548ACRZA-T | IC REG/CTLR ACPI DUAL DDR 28QFN |
| ISL6548CRZA | IC REG/CTRLR ACPI DUAL DDR 28QFN |
| ISL6551IR-T | IC REG CTRLR FLYBACK PWM 28-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6540AIRZR5359 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6540AIRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6540AIRZ-TR5359 | 制造商:Intersil Corporation 功能描述: |
| ISL6540AIRZ-TR5453 | 制造商:Intersil Corporation 功能描述:STD. ISL6540AIRZ-T WITH GOLD BOND WIRE ONLY - Tape and Reel |
| ISL6540CRZ | 制造商:Intersil Corporation 功能描述:VOLT MODE PWM CNTRLR 0.6V TO 20V 30A 28QFN EP - Rail/Tube |
发布紧急采购，3分钟左右您将得到回复。