参数资料
| 型号： | ISL6540AIRZA-T |
| 厂商： | Intersil |
| 文件页数： | 8/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 28-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 2MHz |
| 占空比： | 100% |
| 电源电压： | 2.97 V ~ 22 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-VFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 产品目录页面： | 1243 (CN2011-ZH PDF) |
| 其它名称： | ISL6540AIRZA-TDKR |
ISL6540A
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Parts are 100% tested at +25°C. Temperature
limits established by characterization and are not production tested. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VIN DV/DT_Max Maximum VIN DV/DT
V IN = 0 V to V IN step, PVCC < 2.0V at V IN
-
1
-
V/μs
application; V IN > 6.5V
V IN = 2.0 V to V IN step, 2.0V < PVCC at V IN
-
0.05
-
V/μs
application; V IN > 6.5V
EXTERNAL LINEAR REGULATOR
LIN_DRV
Maximum Sinking Drive Current
LIN_DRV = VIN = 20V
LIN_DRV = VIN = 3.3V
1.30
1.67
4.17
3.88
5.30
4.67
mA
mA
OPERATIONAL TRANSCONDUCTANCE AMPLIFIER (OTA)
DC Gain
Drive Capability
C SS = 0.1μF, at SS Pin
C SS = 0.1μF, at SS Pin
-
30
88
37
-
44
dB
μA
GATE DRIVERS
R UGATE
Ugate Source Resistance
500mA Source Current, PVCC = 5.0V
-
1.0
-
Ω
I UGATE
Ugate Source Saturation Current V UGATE-PHASE = 2.5V, PVCC = 5.0V
-
2.0
-
A
R UGATE
I UGATE
R LGATE
I LGATE
R LGATE
I LGATE
Ugate Sink Resistance
Ugate Sink Saturation Current
Lgate Source Resistance
Lgate Source Saturation Current
Lgate Sink Resistance
Lgate Sink Saturation Current
500mA Sink Current, PVCC = 5.0V
V UGATE-PHASE = 2.5V, PVCC = 5.0V
500mA Source Current, PVCC = 5.0V
V LGATE = 2.5V, PVCC = 5.0V
500mA Sink Current, PVCC = 5.0V
V LGATE = 2.5V, PVCC = 5.0V
-
-
-
-
-
-
1.0
2.0
1.0
2.0
0.4
4.0
-
-
-
-
-
-
Ω
A
Ω
A
Ω
A
OVERCURRENT PROTECTION (OCP)
I LSOC
Low Side OCP (LSOC) Current
LSOC = 0V to VCC - 1.0V, T A = 0°C to +70°C
86
100
107
μA
Source
I LSOC_OFSET LSOC Maximum Offset Error
LSOC = 0V to VCC - 1.0V, T A = -40°C to +85°C
VCC = 2.9V and 5.6V T SAMPLE < 10μs
84
-
100
±2
109
-
μA
mV
I HSOC
High Side OCP (HSOC) Current
HSOC = 0.8V to 22V T A = 0°C to +70°C
91
100
106
μA
Source
I HSOC_LOW
I HSOC_OFSET HSOC Maximum Offset Error
HSOC = 0.8V to 22V T A = -40°C to +85°C
HSOC = 0.3V to 0.8V
VCC = 2.9V and 5.5V T SAMPLE < 10μs
89
84
-
100
-
±2
107
107
-
μA
μA
mV
MARGINING CONTROL
V MARG
Minimum Margining Voltage of
R MARG = 10k Ω , R OFS- = 6.01k Ω ,
-187
-197
-209
mV
Internal Reference
MAR_CRTL = 0V
V MARG
Maximum Margining Voltage of
R MARG = 10k Ω , R OFS+ = 6.01k Ω ,
185
197
208
mV
Internal Reference
MAR_CRTL = VCC
N MARG
MAR_CTRL
MAR_CTRL
MAR_CTRL
Margining Transfer Ratio
Positive Margining Threshold
Negative Margining Threshold
Tri-state Input Level
N MARG = (V OFS- -V OFS+ )/V MARG
Disable Mode
4.84
1.51
0.75
1.21
5
1.8
0.9
1.325
5.22
2.02
1.05
1.40
SDR
V
V
V
POWER GOOD MONITOR
V UVR
V UVF
V OVR
V OVF
Undervoltage Rising Trip Point
Undervoltage Falling Trip Point
Overvoltage Rising Trip Point
Overvoltage Falling Trip Point
-7%
-13%
13%
7%
-9%
-15%
15%
9%
-11%
-17%
17%
11%
V SS
V SS
V SS
V SS
T PG_DLY
I PG_DLY
PGOOD Delay
PGOOD Delay Source Current
C PG_DLY = 0.1μF
-
17
7.1
21
-
24
ms
μA
8
FN6288.5
October 7, 2008
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