参数资料
型号: ISL6557ACB-T
厂商: Intersil
文件页数: 7/18页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 24-SOIC
标准包装: 1,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: 250kHz
占空比: 75%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
ISL6557A
Figure 2 (previous page) illustrates the multiplicative effect
on output ripple frequency. The three channel currents (IL1,
IL2, and IL3), combine to form the AC ripple current and the
DC load current. The ripple component has three times the
ripple frequency of each individual channel current. Each
PWM pulse is terminated 1/3 of a cycle, or 1.33 μ s, after the
PWM pulse of the previous phase. The peak-to-peak current
waveforms for each phase is about 7A, and the DC
components of the inductor currents combine to feed the load.
To understand the reduction of ripple current amplitude in
the multi-phase circuit, examine the equation representing
an individual channel’s peak-to-peak inductor current.
improve overall system cost and size by lowering input ripple
current and allowing the designer to reduce the cost of input
capacitance. The example in Figure 3 illustrates input
currents from a three-phase converter combining to reduce
the total input ripple current.
The converter depicted in Figure 3 delivers 36A to a 1.5V
load from a 12V input. The rms input capacitor current is
5.9A. Compare this to a single-phase converter also down
12V to 1.5V at 36A. The single-phase converter has 11.9A
rms input capacitor current. The single-phase converter
must use an input capacitor bank with twice the rms current
capacity as the equivalent three-phase converter.
( V IN – V OUT ) V OUT
L f S V
I L , PP = ------------------------------------------------------
IN
(EQ. 1)
Figures 15, 16 and 17 the section entitled Input Capacitor
Selection can be used to determine the input-capacitor rms
current based on load current, duty cycle, and the number of
( V IN – N V OUT ) V OUT
I PP = ------------------------------------------------------------
In Equation 1, V IN and V OUT are the input and output
voltages respectively, L is the single-channel inductor value,
and f S is the switching frequency.
(EQ. 2)
L f S V IN
The output capacitors conduct the ripple component of the
inductor current. In the case of multi-phase converters, the
capacitor current is the sum of the ripple currents from each
of the individual channels. Compare Equation 1 to the
expression for the peak-to-peak current after the summation
of N symmetrically phase-shifted inductor currents in Equa-
tion 2. Peak-to-peak ripple current decreases by an amount
proportional to the number of channels. Output-voltage ripple
is a function of capacitance, capacitor equivalent series resis-
tance (ESR), and inductor ripple current. Reducing the induc-
tor ripple current allows the designer to use fewer or less
costly output capacitors.
INPUT-CAPACITOR CURRENT, 10A/DIV
CHANNEL 3
INPUT CURRENT
10A/DIV
CHANNEL 2
INPUT CURRENT
10A/DIV
CHANNEL 1
INPUT CURRENT
10A/DIV
1 μ s/DIV
FIGURE 3. CHANNEL INPUT CURRENTS AND INPUT-
CAPACITOR RMS CURRENT FOR 3-PHASE
CONVERTER
Another benefit of interleaving is to reduce input ripple
current. Input capacitance is determined in part by the
maximum input ripple current. Multi-phase topologies can
7
channels. They are provided as aids in determining the
optimal input capacitor solution. Figure 18 shows the single
phase input-capacitor rms current for comparisson.
PWM OPERATION
The number of active channels selected determines the
timing for each channel. By default, the timing mode for the
ISL6557A is 4-phase. The designer can select 2-phase
timing by connecting PWM3 to VCC or 3-phase timing by
connecting PWM4 to VCC.
One switching cycle for the ISL6557A is defined as the time
between PWM1 pulse termination signals (the internal signal
that initiates a falling edge on PWM1). The cycle time is the
inverse of the switching frequency selected by the resistor
connected between the FS pin and ground (see Switching
Frequency ). Each cycle begins when a clock signal
commands the channel-1 PWM output to go low. This
signals the channel-1 MOSFET driver to turn off the
channel-1 upper MOSFET and turn on the channel-1
synchronous MOSFET. If two-channel operation is selected,
the PWM2 pulse terminates 1/2 of a cycle later. If three
channels are selected the PWM2 pulse terminates 1/3 of a
cycle after PWM1, and the PWM3 output will follow after
another 1/3 of a cycle. When four channels are selected, the
pulse-termination times are spaced in 1/4 cycle increments.
Once a channel’s PWM pulse terminates, it remains low for
a minimum of 1/4 cycle. This forced off time is required to
assure an accurate current sample as described in Current
Sensing . Following the 1/4-cycle forced off time, the
controller enables the PWM output. Once enabled, the PWM
output transitions high when the sawtooth signal crosses the
adjusted error-amplifier output signal, V COMP as illustrated
in Figures 1 and 5. This is the signal for the MOSFET driver
to turn off the synchronous MOSFET and turn on the upper
MOSFET. The output will remain high until the clock signals
the beginning of the next cycle by commanding the PWM
pulse to terminate.
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ISL6557ACBZ 功能描述:IC REG CTRLR BUCK PWM VM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
ISL6557ACBZ-T 功能描述:IC REG CTRLR BUCK PWM VM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:带卷 (TR)
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