参数资料
| 型号： | ISL6557ACB-T |
| 厂商： | Intersil |
| 文件页数： | 8/18页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 24-SOIC |
| 标准包装： | 1,000 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 250kHz |
| 占空比： | 75% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 包装： | 带卷 (TR) |
ISL6557A
CURRENT SENSING
Intersil multi-phase controllers sense current by sampling the
voltage across the lower MOSFET during its conduction
interval. MOSFET r DS(ON) sensing is a no-added-cost
method to sense current for load-line regulation, channel-
current balance, module current sharing, and overcurrent
protection. If desired, an independent current-sense resistor
in series with the lower-MOSFET source can serve as a
sense element in place of the MOSFET r DS(ON) .
V IN
sampled channel currents combines with the channel 1
sample, I 1 , to create an error signal I ER . The filtered error
signal modifies the pulse width commanded by V COMP to
correct any unbalance and force I ER toward zero.
In some circumstances, it may be necessary to deliberately
design some channel-current unbalance into the system. In
a highly compact design, one or two channels may be able
to cool more effectively than the other(s) due to nearby air
flow or heat sinking components. The other channel(s) may
have more difficulty cooling with comparatively less air flow
DS ( ON )
SEN = I L --------------------------
I n
I
r
ISEN
CHANNEL N
UPPER MOSFET
and heat sinking. The hotter channels may also be located
close to other heat-generating components tending to drive
their temperature even higher. In these cases, a proper
SAMPLE
&
HOLD
-
+
ISEN(n)
R ISEN
-
+
I L
I L r DS ( ON )
selection of the current sense resistors (R ISEN in Figure 4)
introduces channel current unbalance into the system.
Increasing the value of R ISEN in the cooler channels and
decreasing it in the hotter channels moves all channels into
thermal balance at the expense of current balance.
OVERCURRENT PROTECTION
ISL6557A INTERNAL CIRCUIT
CHANNEL N
LOWER MOSFET
EXTERNAL CIRCUIT
The average current, I AVG in Figure 5, is continually
compared with a constant 75 μ A reference current. If the
average current at any time exceeds the reference current,
FIGURE 4. INTERNAL AND EXTERNAL CURRENT-SENSING
CIRCUITRY
The ISEN input for each channel uses a ground-referenced
amplifier to reproduce a signal proportional to the channel
current (Figure 4). After sufficient settling time, the sensed
current is sampled, and the sample is used for current
the comparator triggers the converter to shut down. All PWM
signals are placed in a high-impedance state which signals
the drivers to turn off both upper and lower MOSFETs. The
system remains in this state while the controller counts 2048
phase-clock cycles.
balance, load-line regulation and overcurrent protection. The
ISL6557A samples channel current once each cycle.
Figure 4 shows how the sampled current, I n , is created from
the channel current I L . The circuitry in Figure 4 represents
the current measurement and sampling circuitry for channel
V COMP
+
-
f(j ω )
+
-
SAWTOOTH SIGNAL
PWM1
n in an N-channel converter. This circuitry is repeated for
each channel in the converter but may not be active in
channels 3 and 4 depending on the particular
I ER
-
I AVG
÷ N
Σ
I 4 *
I 3 *
implementation (see PWM Operation ).
CHANNEL-CURRENT BALANCE
+
I 2
Another benefit of multi-phase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this, the
designer avoids the complexity of driving multiple parallel
MOSFETs and the expense of using expensive heat sinks
and exotic magnetic materials.
In order to fully realize the thermal advantage, it is important
that each channel in a multi-phase converter be controlled to
deliver about the same current at any load level. Intersil
multi-phase controllers guarantee current balance by
comparing each channel’s current to the average current
delivered by all channels and making an appropriate
adjustment to each channel’s pulse width based on the
error. Intersil’s patented current-balance method is
illustrated in Figure 5 where the average of the 2, 3, or 4
8
I 1
FIGURE 5. CHANNEL-1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
NOTE: *Channels 3 and 4 are optional.
This is followed by a soft-start attempt (see Soft-Start ). If the
soft-start attempt is successful, operation will continue as
normal. Should the soft-start attempt fail, the ISL6557A
repeats the 2048-cycle wait period and follows with another
soft-start attempt. This hiccup mode of operation continues
相关PDF资料 |
PDF描述 |
|---|---|
| ISL6558IR-T | IC REG CTRLR BUCK PWM 20-QFN |
| ISL6559CBZ-T | IC REG CTRLR BUCK PWM VM 28-SOIC |
| ISL6561CR-T | IC CTRLR PWM MULTIPHASE 40-QFN |
| ISL6563IR-T | IC CTRLR PWM MULTIPHASE 24-QFN |
| ISL6564AIRZ | IC REG CTRLR BUCK PWM VM 40-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6557ACBZ | 功能描述:IC REG CTRLR BUCK PWM VM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6557ACBZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 24-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6557CB | 制造商:Intersil Corporation 功能描述: |
| ISL6557CB-T | 制造商:Intersil Corporation 功能描述: |
| ISL6557CB-T WAF | 制造商:Intersil Corporation 功能描述: |
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