参数资料
型号: ISL6561CR-T
厂商: Intersil
文件页数: 20/26页
文件大小: 0K
描述: IC CTRLR PWM MULTIPHASE 40-QFN
标准包装: 4,000
应用: 控制器,Intel VR10X
输入电压: 3 V ~ 12 V
输出数: 4
输出电压: 0.84 V ~ 1.6 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: 40-QFN(6x6)
包装: 带卷 (TR)
ISL6561
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
At turn on, the upper MOSFET begins to conduct and this
transition occurs over a time t 2 . In Equation 18, the
approximate power loss is P UP,2 .
P UP , 2 ≈ V IN ? ------ – --------- ? ? ---- 2 ? f S
MOSFET is due to current conducted through the channel
resistance (r DS(ON) ). In Equation 15, I M is the maximum
continuous output current; I PP is the peak-to-peak inductor
? I M I PP ? ? t ?
? N 2 ? ? 2 ?
(EQ. 18)
? I M ? 2 I L , PP ( 1 – d ) (EQ. 15)
P LOW , 1 = r DS ( ON ) ? ------ ? ( 1 – d ) + --------------------------------
current (see Equation 1); d is the duty cycle (V OUT /V IN ); and
L is the per-channel inductance.
? N ? 12
An additional term can be added to the lower-MOSFET loss
A third component involves the lower MOSFET’s reverse-
recovery charge, Q rr . Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Q rr , it is conducted
through the upper MOSFET across VIN. The power
dissipated as a result is P UP,3 and is approximately
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
P UP , 3 = V IN Q rr f S
(EQ. 19)
diode forward voltage at I M , V D(ON) ; the switching frequency,
f S ; and the length of dead times, t d1 and t d2 , at the
beginning and the end of the lower-MOSFET conduction
interval respectively.
Finally, the resistive part of the upper MOSFET’s is given in
Equation 19 as P UP,4 .
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
P LOW , 2 = V D ( ON ) f S ? ------ + I --------- ? t
I PP ?
? I
d1 + ? ------ – --------- ? t d2
I M PP
? N 2 ?
M
? N 2 ?
(EQ. 16)
from Equations 17, 18, 19 and 20. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
I PP2
? I M ?
P UP , 4 ≈ r DS ( ON ) ? ------ ? d + ----------
Thus the total maximum power dissipated in each lower
MOSFET is approximated by the summation of P LOW,1 and
P LOW,2 .
2
? N ? 12
(EQ. 20)
UPPER MOSFET POWER CALCULATION
In addition to r DS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (V IN ) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q rr ; and the upper MOSFET r DS(ON)
conduction loss.
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
Current Sensing Resistor
The resistors connected between these pins and the
respective phase nodes determine the gains in the load-line
regulation loop and the channel-current balance loop as well
as setting the overcurrent trip point. Select values for these
resistors based on the room temperature r DS(ON) of the
lower MOSFETs, DCR of inductor or additional resistor; the
full-load operating current, I FL ; and the number of phases, N
R X I FL
R ISEN = -----------------------
70 × 10 – 6
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
using Equation 21.
--------
N
(EQ. 21)
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 17,
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistor. When the components of
P UP , 1 ≈ V IN ? ------ + --------- ? ? ---- 1 ? f S
the required time for this commutation is t 1 and the
approximated associated power loss is P UP,1 .
I M I PP ? t ?
? N 2 ? ? 2 ?
(EQ. 17)
one or more channels are inhibited from effectively dissipating
their heat so that the affected channels run hotter than
desired, chose new, smaller values of R ISEN for the affected
phases (see the section entitled Channel-Current Balance ).
Choose R ISEN,2 in proportion to the desired decrease in
temperature rise in order to cause proportionally less current
to flow in the hotter phase.
R ISEN , 2 = R ISEN ---------- 2
20
? T
? T 1
(EQ. 22)
FN9098.5
May 12, 2005
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