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参数资料
| 型号： | ISL6567IRZ-TS2698 |
| 厂商： | Intersil |
| 文件页数： | 22/25页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 24-QFN |
| 标准包装： | 6,000 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1.5MHz |
| 占空比： | 66% |
| 电源电压： | 4.9 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
ISL6567
? I OUT ? 2
I L , PP ( 1 – D )
P LMOS1 = r DS ( ON ) ? ----------- ? ( 1 – D ) + --------------------------------
? 2 ?
? I OUT I PP ? ? I OUT I PP ?
2 ? d1
P LMOS 2 = V D ( ON ) f S ? ----------- + -------- ? t + ? ----------- – -------- ? t d2
The power components should be placed first. Locate the input
capacitors close to the power switches. Minimize the length of
the connections between the input capacitors, C IN , and the
power switches. Locate the output inductors and output
capacitors between the MOSFETs and the load. Locate all the
high-frequency decoupling capacitors (ceramic) as close as
practicable to their decoupling target, making use of the
shortest connection paths to any internal planes, such as vias
to GND immediately next, or even onto the capacitor’s
grounded solder pad.
The critical small components include the bypass capacitors
for VCC and PVCC. Locate the bypass capacitors, C BP , close to
the device. It is especially important to locate the components
associated with the feedback circuit close to their respective
controller pins, since they belong to a high-impedance circuit
loop, sensitive to EMI pick-up. It is important to place the R ISEN
resistors close to the respective terminals of the ISL6567.
A multi-layer printed circuit board is recommended. Figure 26
shows the connections of the critical components for one output
channel of the converter. Note that capacitors C xxIN and C xxOUT
could each represent numerous physical capacitors. Dedicate one
solid layer, usually the one underneath the component side of the
board, for a ground plane and make all critical component ground
connections with vias to this layer. Dedicate another solid layer as
a power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the PHASE
terminal to inductor L OUT short. The power plane should support
the input power and output power nodes. Use copper filled
polygons on the top and bottom circuit layers for the phase nodes.
Use the remaining printed circuit layers for small signal wiring.
Size the trace interconnects commensurate with the signals
they are carrying. Use narrow (0.005” to 0.008”) and short
traces for the high-impedance, small-signal connections, such
as the feedback, compensation, soft-start, frequency set,
enable, reference track, etc. The wiring traces from the IC to the
MOSFETs’ gates and sources should be wide (0.02” to 0.05”)
and short, encircling the smallest area possible.
Component Selection
Guidelines
MOSFETS
The selection of MOSFETs revolves closely around the current
each MOSFET is required to conduct, the switching
characteristics, the capability of the devices to dissipate heat, as
well as the characteristics of available heat sinking. Since the
ISL6567 drives the MOSFETs with a 5V signal, the selection of
appropriate MOSFETs should be done by comparing and
evaluating their characteristics at this specific V GS bias voltage.
The following paragraphs addressing MOSFET power dissipation
ignore the driving losses associated with the gate resistance.
The aggressive design of the shoot-through protection circuits,
resistance (R G ), late-generation MOSFETs. If employing
MOSFETs with a nominal gate resistance in excess of 1-2 Ω ,
check for the circuit’s proper operation. A few examples (non
exclusive list) of suitable MOSFETs to be used in ISL6567
applications include the D8 (and later) generation from Renesas
and the OptiMOS?2 line from Infineon. Along the same line, the
use of gate resistors is discouraged, as they may interfere with
the circuits just mentioned.
LOWER MOSFET POWER CALCULATION
Since virtually all of the heat loss in the lower MOSFET is
conduction loss (due to current conducted through the channel
resistance, r DS(ON) ), a quick approximation for heat dissipated in
the lower MOSFET can be found using Equation 25:
2
(EQ. 25)
12
where: I M is the maximum continuous output current, I L,PP is
the peak-to-peak inductor current, and D is the duty cycle
(approximately V OUT /V IN ).
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the lower-
MOSFET body diode. This term is dependent on the diode
forward voltage at I M , V D(ON) ; the switching frequency, f S ; and
the length of dead times, t d1 and t d2 , at the beginning and the
end of the lower-MOSFET conduction interval, respectively.
? 2 ? 2 2 ?
(EQ. 26)
Equation 26 assumes the current through the lower MOSFET is
always positive; if so, the total power dissipated in each lower
MOSFET is approximated by the summation of P LMOS1 and
P LMOS2 .
UPPER MOSFET POWER CALCULATION
In addition to r DS(ON) losses, a large portion of the
upper-MOSFET losses are switching losses, due to currents
conducted through the device while the input voltage is
present as V DS . Upper MOSFET losses can be divided into
separate components, separating the upper-MOSFET switching
losses, the lower-MOSFET body diode reverse recovery charge
loss, and the upper MOSFET r DS(ON) conduction loss.
In most typical circuits, when the upper MOSFET turns off, it
continues to conduct a decreasing fraction of the output
inductor current as the voltage at the phase node falls below
ground. Once the lower MOSFET begins conducting (via its
body diode or enhancement channel), the current in the upper
MOSFET decreases to zero. In Equation 27, the required time
for this commutation is t 1 and the associated power loss is
P UMOS,1 .
P UMOS , 1 ≈ V IN ? ----------- + ------------ ? ? ---- 1 - ? f S
part of the ISL6567 output drivers, is geared toward reducing
the deadtime between the conduction of the upper and the
lower MOSFET/s. The short deadtimes, coupled with strong
pull-up and pull-down output devices driving the UGATE and
LGATE pins make the ISL6567 best suited to driving low gate
22
? I OUT I L , PP ? ? t ?
? N 2 ? ? 2 ?
(EQ. 27)
FN9243.4
August 9, 2011
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