参数资料
型号: ISL6569CR-T
厂商: Intersil
文件页数: 21/22页
文件大小: 0K
描述: IC REG CTRLR DIVIDER PWM 32-QFN
标准包装: 6,000
PWM 型: 控制器
输出数: 1
频率 - 最大: 2MHz
占空比: 75%
电源电压: 4.75 V ~ 5.25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 带卷 (TR)
ISL6569
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
H
0.25(0.010) M
B M
M24.3 (JEDEC MS-013-AD ISSUE C)
24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
-B-
SYMBOL
A
MIN
0.0926
MAX
0.1043
MIN
2.35
MAX
2.65
NOTES
-
1
2
3
L
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.020
0.33
0.51
9
SEATING PLANE
C
0.0091
0.0125
0.23
0.32
-
-A-
D
A
h x 45 o
D
0.5985
0.6141
15.20
15.60
3
E
0.2914
0.2992
7.40
7.60
4
e
B
0.25(0.010) M
NOTES:
-C-
C A M
B S
A1
μ α
0.10(0.004)
C
e
H
h
L
N
α
0.05 BSC
0.394 0.419
0.010 0.029
0.016 0.050
24
0 o
8 o
1.27 BSC
10.00 10.65
0.25 0.75
0.40 1.27
24
0 o
8 o
-
-
5
6
7
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
21
Rev. 0 12/93
FN9085.7
December 29, 2004
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