参数资料
| 型号： | ISL6611AIRZ |
| 厂商： | Intersil |
| 文件页数： | 12/14页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR DOUBLER PWM 16-QFN |
| 标准包装： | 75 |
| PWM 型： | 控制器 |
| 输出数： | 2 |
| 频率 - 最大： | 1MHz |
| 电源电压： | 4.5 V ~ 5.5 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 是 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 包装： | 管件 |
ISL6611A
< 400ns. For a good current balance, it is recommended to
keep at least 200ns sampling time, if not the full 400ns.
Equations 5 and 6 show the maximum frequency of each
channel in interleaving mode and synchronous mode,
respectively. Assume 80ns each for t PD , t LR , t LF and 200ns
each for t AVSAMP , t BLANK , the maximum channel frequency
can be set to no more than 500kHz at interleaving mode and
1MHz at synchronous mode, respectively, for an application
with a maximum duty cycle of 20%. The maximum duty cycle
occurs at the maximum output voltage (overvoltage trip level
as needed) and at the minimum input voltage (undervoltage
trip level as needed). The efficiency of the voltage regulator
is also a factor in the theoretical approximation. Figure 7
Application Information
MOSFET and Driver Selection
The parasitic inductances of the PCB and of the power
devices’ packaging (both upper and lower MOSFETs) can
cause serious ringing, exceeding absolute maximum rating
of the devices. The negative ringing at the edges of the
PHASE node could increase the bootstrap capacitor voltage
through the internal bootstrap diode, and in some cases, it
may overstress the upper MOSFET driver. Careful layout,
proper selection of MOSFETs and packaging, as well as the
proper driver can go a long way toward minimizing such
unwanted stress.
shows the relationship between the maximum channel
frequency and the maximum duty cycle in the previous
assumed conditions.
For interleaving mode (SYNC = “0”),
PVCC
R HI1
BOOT
G
D
F SW ( MAX ) ≈ ----------------------------------------------------------------------------------------------------------------
1 – 2 ? D ( MAX )
( t AVSAMP + t PD + t LR + t LF + t BLANK ) ? 2
R LO1
UGATE
Q1
D ( MAX ) ≈ -------------------------------------
VOUT ( MAX )
VIN ( MIN ) ? η
(EQ. 5)
PHASE
R PH = 1 Ω TO 2 Ω
S
F SW ( MAX ) ≈ --------------------------------------------------------------------------------------------------------
For synchronous mode (SYNC = “1”),
1 – D ( MAX )
( t AVSAMP + t PD + t LR + t LF + t BLANK )
10
(EQ. 6)
FIGURE 8. PHASE RESISTOR TO MINIMIZE SERIOUS
NEGATIVE PHASE SPIKE IF NEEDED
The selection of D 2 -PAK, or D-PAK packaged MOSFETs, is
a much better match (for the reasons discussed) for the
ISL6611A with a phase resistor (R PH ), as shown in Figure 8.
Low-profile MOSFETs, such as Direct FETs and multi-source
leads devices (SO-8, LFPAK, PowerPAK), have low parasitic
lead inductances and can be driven by ISL6611A (assuming
proper layout design) without the phase resistor (R PH ).
Layout Considerations
1
SYNCHRONOUS
INTERLEAVING
A good layout helps reduce the ringing on the switching
node (PHASE) and significantly lower the stress applied to
the output drives. The following advice is meant to lead to an
optimized layout and performance:
? Keep decoupling loops (VCC-GND, PVCC-PGND and
0.1
0 20 40 60 80 100
DUTY CYCLE (%)
FIGURE 7. MAXIMUM CHANNEL SWITCHING FREQUENCY
vs MAXIMUM DUTY CYCLE IN ASSUMED
CONDITIONS
Note that the PWM controller should be set to 2 x F SW for
interleaving mode and the same switching frequency for the
synchronous mode.
12
BOOT-PHASE) short and wide, at least 25 mils. Avoid
using vias on decoupling components other than their
ground terminals, which should be on a copper plane with
at least two vias.
? Minimize trace inductance, especially on low-impedance
lines. All power traces (UGATE, PHASE, LGATE, PGND,
PVCC, VCC, GND) should be short and wide, at least
25 mils. Try to place power traces on a single layer,
otherwise, two vias on interconnection are preferred
where possible. For no connection (NC) pins on the QFN
FN6881.1
August 28, 2012
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| ISL6611AIRZ-T | 功能描述:IC REG CTRLR DOUBLER PWM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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