参数资料
| 型号： | ISL8101CRZ-T |
| 厂商： | Intersil |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 2PHASE 24-QFN |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 4.6 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 2.3 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN（4x4） |
| 包装： | 带卷 (TR) |
ISL8101
TABLE 3. VRM10 VOLTAGE IDENTIFICATION CODES
(Continued)
DYNAMIC VID (VID-ON-THE-FLY)
The ISL8101 is capable of executing on-the-fly output
VID4
0
1
1
1
1
1
1
1
1
VID3
0
1
1
1
1
1
1
1
1
VID2
0
1
1
1
1
1
1
0
0
VID1
0
1
1
0
0
0
0
1
1
VID0
0
0
0
1
1
0
0
1
1
VID5
0
1
0
1
0
1
0
1
0
VDAC
1.0875
1.1000
1.1125
1.1250
1.1375
1.1500
1.1625
1.1750
1.1875
voltage changes. The way the ISL8101 reacts to a change in
the VID code is dependent on the VID configuration. In
VRM9 or AMD Hammer settings, the ISL8101 checks for a
change in the VID code four times each switching cycle. The
VID code is the bit pattern present at pins VID4-VID0. If a
new code is established and it stays the same for 12
switching cycles, the ISL8101 begins changing the reference
by making one step change every four switching cycles until
it reaches the new VID code. Figure 5 depicts such a
transition, from 1.5V to 1.7V
1
1
1
1
0
0
1
1
0
0
1
0
1.2000
1.2125
01110
00110
V VID
VID CHANGE OCCURS HERE
1
1
1
1
0
0
0
0
1
1
1
0
1.2250
1.2375
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1.2500
1.2625
1.2750
1.2875
1.300
1.3125
1.3250
1.3375
1.3500
1.3625
1.3750
1.3875
1.4000
1.4125
1.4250
1.4375
1.4500
1.4625
1.4750
1.4875
1.5000
1.5125
1.5250
1.5375
1.5500
1.5625
1.5750
1.5875
1.6000
V REF (100mV/DIV)
1.5V
V OUT (100mV/DIV)
1.5V
FIGURE 5. TYPICAL DYNAMIC-VID OPERATION, VRM9 DAC
SETTING
In VRM10 setting, the ISL8101 checks for a change in the VID
code six times each switching cycle. If a new code is
established and it stays the same for 3 consecutive readings,
the ISL8101 recognizes the change and increments the
reference. Specific to VRM10, the processor controls the VID
transitions and is responsible for incrementing or
decrementing one VID step at a time. In VRM10 setting, the
ISL8101 will immediately change the reference to the new
requested value as soon as the request is validated; in cases
where the reference step is too large, the sudden change can
trigger overcurrent or overvoltage events.
In non-VRM10 settings, due to the way the ISL8101
recognizes VID code changes, up to one full switching
period may pass before a VID change registers. Thus, the
total time required for a VID change, t DVID , is dependent on
the switching frequency (f S ), the size of the change ( Δ V ID ),
and the time required to register the VID change. The
approximate time required for a ISL8101-based converter in
VRM9 configuration running at typical f S (222kHz) to
perform a 1.5V-to-1.7V reference voltage change is about
196μs, as calculated using Equation 6. (this example is also
illustrated in Figure 5).
t DVID ? ----- ? --------------------- + 13 ?
11
1 ? 4 Δ V VID ?
f S ? 0.025 ?
(EQ. 6)
FN9223.1
July 28, 2008
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