参数资料
| 型号： | ISL8101CRZ-T |
| 厂商： | Intersil |
| 文件页数： | 4/20页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 2PHASE 24-QFN |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 4.6 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 2.3 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN（4x4） |
| 包装： | 带卷 (TR) |
ISL8101
Absolute Maximum Ratings
Thermal Information
Supply Voltage, V CC , P VCC . . . . . . . . . . . . . . . . . . . -0.3V to +6.25V
Thermal Resistance
θ JA (°C/W)
θ JC (°C/W)
Absolute Boot Voltage, V BOOT . . . . . . P GND - 0.3V to P GND + 27V
Phase Voltage, V PHASE . . . . . . . . . . V BOOT - 7V to V BOOT + 0.3V
Upper Gate Voltage, V UGATE . . . . V PHASE - 0.3V to V BOOT + 0.3V
Lower Gate Voltage, V LGATE . . . . . . . . . P GND - 0.3V to V CC + 0.3V
Input, Output, or I/O Voltage . . . . . . . . . . GND - 0.3V to V CC + 0.3V
QFN Package (Notes 1, 2). . . . . . . . . . 45 7.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
Recommended Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ± 5%
Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Test Conditions: V CC = 5V, T J = 0°C to +85°C, Unless Otherwise Specified. Parameters with MIN and/or MAX
limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
VCC POR (Power-On Reset) Threshold
PVCC POR (Power-On Reset) Threshold
Switching Frequency (per channel)
Oscillator Ramp Amplitude (Note 3)
Maximum Duty Cycle
I VCC ; ENLL = high
VCC Rising
VCC Falling
PVCC Rising
PVCC Falling
T J = +25°C to +85°C
T J = -40°C
V P-P
-
4.2
3.7
-
-
189
166
-
-
4
4.4
3.9
4.3
3.3
222
205
1.33
67
6
4.6
4.1
-
-
255
241
-
-
mA
V
V
V
V
kHz
kHz
V
%
CONTROL THRESHOLDS
ENLL Rising Threshold
ENLL Falling Threshold
-
-
0.645
0.567
-
-
V
mV
REFERENCE AND DAC
System Accuracy
DAC Input Low Voltage
DAC Input High Voltage
T J = -40°C to +85°C
-1
-1.5
-
0.8
-
-
-
-
1
1.5
0.4
-
%
%
V
V
DAC Input Pull-Up Current
VIDx = 0V
-
45
-
μA
ERROR AMPLIFIER
DC Gain (Note 3)
Gain-Bandwidth Product (Note 3)
Slew Rate (Note 3)
Maximum Output Voltage
Minimum Output Voltage
R L = 10k to ground
C L = 100pF, R L = 10k to ground
C L = 100pF, Load = ± 400μA
Load = 1mA
Load = -1mA
-
-
-
3.90
-
96
20
8
4.20
0.80
-
-
-
-
0.90
dB
MHz
V/μs
V
V
4
FN9223.1
July 28, 2008
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